[PATCH] D40320: [NFC] CodeGen: Handle shift amount type in DAGTypeLegalizer::SplitInteger
Yaxun Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 22 19:09:48 PST 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL318890: [NFC] CodeGen: Handle shift amount type in DAGTypeLegalizer::SplitInteger (authored by yaxunl).
Changed prior to commit:
https://reviews.llvm.org/D40320?vs=123876&id=124030#toc
Repository:
rL LLVM
https://reviews.llvm.org/D40320
Files:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.h
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h
@@ -18,7 +18,6 @@
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/TargetLowering.h"
-#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
namespace llvm {
@@ -676,14 +675,8 @@
void markLibCallAttributes(MachineFunction *MF, unsigned CC,
ArgListTy &Args) const override;
- // For i512, DAGTypeLegalizer::SplitInteger needs a shift amount 256,
- // which cannot be held by i8, therefore use i16 instead. In all the
- // other situations i8 is sufficient.
MVT getScalarShiftAmountTy(const DataLayout &, EVT VT) const override {
- MVT T = VT.getSizeInBits() >= 512 ? MVT::i16 : MVT::i8;
- assert((VT.getSizeInBits() + 1) / 2 < (1U << T.getSizeInBits()) &&
- "Scalar shift amount type too small");
- return T;
+ return MVT::i8;
}
const MCExpr *
Index: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -1172,11 +1172,14 @@
assert(LoVT.getSizeInBits() + HiVT.getSizeInBits() ==
Op.getValueSizeInBits() && "Invalid integer splitting!");
Lo = DAG.getNode(ISD::TRUNCATE, dl, LoVT, Op);
- Hi =
- DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,
- DAG.getConstant(LoVT.getSizeInBits(), dl,
- TLI.getScalarShiftAmountTy(
- DAG.getDataLayout(), Op.getValueType())));
+ unsigned ReqShiftAmountInBits =
+ Log2_32_Ceil(Op.getValueType().getSizeInBits());
+ MVT ShiftAmountTy =
+ TLI.getScalarShiftAmountTy(DAG.getDataLayout(), Op.getValueType());
+ if (ReqShiftAmountInBits > ShiftAmountTy.getSizeInBits())
+ ShiftAmountTy = MVT::getIntegerVT(NextPowerOf2(ReqShiftAmountInBits));
+ Hi = DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,
+ DAG.getConstant(LoVT.getSizeInBits(), dl, ShiftAmountTy));
Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi);
}
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