[PATCH] D40334: [X86] Break false dependencies for POPCNT, LZCNT, TZCNT

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:8011
+  // GPR
+  case X86::POPCNT16rm:
+  case X86::POPCNT32rm:
----------------
Why are the register forms missing? They have the problem too.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:8234
+  } else if (X86::GR64RegClass.contains(Reg)) {
+    BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::XOR64rr), Reg)
+      .addReg(Reg, RegState::Undef)
----------------
Use XOR32rr on the 32-bit sub register. Shorter encoding and 0s the upper bits.


================
Comment at: lib/Target/X86/X86InstrInfo.cpp:8244
+  } else if (X86::GR16RegClass.contains(Reg)) {
+    BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::XOR16rr), Reg)
+      .addReg(Reg, RegState::Undef)
----------------
XOR16rr is not a dependency breaking instruction. It still reads bits 31:16 of the register and passes them through.


Repository:
  rL LLVM

https://reviews.llvm.org/D40334