[PATCH] D40177: performance improvements for ThunderX2 T99

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


================
Comment at: lib/Target/AArch64/AArch64SchedThunderX2T99.td:394
 def : WriteRes<WriteAtomic,  []> {
-  let Unsupported = 1;
+  let Unsupported = 0;
+  let Latency = 4;
----------------
`Unsupported = 0` should be the default, so you should be able to just drop this line, see https://github.com/llvm-mirror/llvm/blob/master/include/llvm/Target/TargetSchedule.td#L257

Also if I understand correctly, this should have an impact on scheduling instructions using WriteAtomic, like CASB. So it should be possible to create a test making sure the scheduler uses that info as expected. Although I am not sure if it's worth it and how much work that would be :)

Finally, this seems unrelated to the LoopMicroOpBufferSize change and could be split out in a separate patch.


Repository:
  rL LLVM

https://reviews.llvm.org/D40177