[llvm] r318841 - [AMDGPU][mc][tests] Updated generated lit tests for GFX8/9

[Dmitry Preobrazhensky via llvm-commits]

Author: dpreobra
Date: Wed Nov 22 07:47:27 2017
New Revision: 318841

URL: http://llvm.org/viewvc/llvm-project?rev=318841&view=rev
Log:
[AMDGPU][mc][tests] Updated generated lit tests for GFX8/9

Summary:
Added tests to better cover features introduced by commit rL318675.
See http://llvm.org/viewvc/llvm-project?view=revision&revision=318675

Modified:
    llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s
    llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s
    llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
    llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt

Modified: llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s?rev=318841&r1=318840&r2=318841&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s Wed Nov 22 07:47:27 2017
@@ -118538,3 +118538,2010 @@ v_cmpx_t_u32_sdwa vcc, v1, v2 src0_sel:D
 
 v_cmpx_t_u32_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x16,0x06,0x0e]
+
+v_add_u32 v5, vcc, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x32]
+
+v_add_u32 v255, vcc, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x33]
+
+v_add_u32 v5, vcc, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x32]
+
+v_add_u32 v5, vcc, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, tba_lo, v2
+// CHECK: [0x6c,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, tba_hi, v2
+// CHECK: [0x6d,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, tma_lo, v2
+// CHECK: [0x6e,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, tma_hi, v2
+// CHECK: [0x6f,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, ttmp11, v2
+// CHECK: [0x7b,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x32]
+
+v_add_u32 v5, vcc, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf]
+
+v_add_u32 v5, vcc, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f]
+
+v_add_u32 v5, vcc, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x32]
+
+v_add_u32_e64 v5, s[12:13], v1, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v255, s[12:13], v1, v2
+// CHECK: [0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, s[14:15], v1, v2
+// CHECK: [0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, s[100:101], v1, v2
+// CHECK: [0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, flat_scratch, v1, v2
+// CHECK: [0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, vcc, v1, v2
+// CHECK: [0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, tba, v1, v2
+// CHECK: [0x05,0x6c,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, tma, v1, v2
+// CHECK: [0x05,0x6e,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, ttmp[10:11], v1, v2
+// CHECK: [0x05,0x7a,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], v255, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], s1, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], s101, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], flat_scratch_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], flat_scratch_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], vcc_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], vcc_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], tba_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6c,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], tba_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6d,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], tma_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6e,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], tma_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6f,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], ttmp11, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7b,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], m0, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], exec_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], exec_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], 0, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], -1, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], 0.5, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], -4.0, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, v255
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, s2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, s101
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, flat_scratch_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, flat_scratch_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, vcc_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, vcc_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, tba_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd9,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, tba_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xdb,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, tma_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xdd,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, tma_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xdf,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, ttmp11
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xf7,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, m0
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, exec_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, exec_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, 0
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, -1
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, 0.5
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00]
+
+v_add_u32_e64 v5, s[12:13], v1, -4.0
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
+
+v_add_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
+
+v_add_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
+
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
+
+v_add_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
+
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
+
+v_add_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
+
+v_addc_u32 v5, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0x0a,0x38]
+
+v_addc_u32 v255, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0xfe,0x39]
+
+v_addc_u32 v5, vcc, v255, v2, vcc
+// CHECK: [0xff,0x05,0x0a,0x38]
+
+v_addc_u32 v5, vcc, 0, v2, vcc
+// CHECK: [0x80,0x04,0x0a,0x38]
+
+v_addc_u32 v5, vcc, -1, v2, vcc
+// CHECK: [0xc1,0x04,0x0a,0x38]
+
+v_addc_u32 v5, vcc, 0.5, v2, vcc
+// CHECK: [0xf0,0x04,0x0a,0x38]
+
+v_addc_u32 v5, vcc, -4.0, v2, vcc
+// CHECK: [0xf7,0x04,0x0a,0x38]
+
+v_addc_u32 v5, vcc, v1, v255, vcc
+// CHECK: [0x01,0xff,0x0b,0x38]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
+
+v_addc_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
+
+v_addc_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v255, s[12:13], v1, v2, s[6:7]
+// CHECK: [0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[14:15], v1, v2, s[6:7]
+// CHECK: [0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[100:101], v1, v2, s[6:7]
+// CHECK: [0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
+// CHECK: [0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, vcc, v1, v2, s[6:7]
+// CHECK: [0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, tba, v1, v2, s[6:7]
+// CHECK: [0x05,0x6c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, tma, v1, v2, s[6:7]
+// CHECK: [0x05,0x6e,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, ttmp[10:11], v1, v2, s[6:7]
+// CHECK: [0x05,0x7a,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v255, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[12:13], 0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[12:13], -1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, v255, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, 0, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, -1, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, s[8:9]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, s[100:101]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, flat_scratch
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, vcc
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, tba
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xb2,0x01]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, tma
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xba,0x01]
+
+v_addc_u32_e64 v5, s[12:13], v1, v2, ttmp[10:11]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xea,0x01]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
+
+v_addc_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
+
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
+
+v_addc_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
+
+v_sub_u32 v5, vcc, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x34]
+
+v_sub_u32 v255, vcc, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x35]
+
+v_sub_u32 v5, vcc, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x34]
+
+v_sub_u32 v5, vcc, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, tba_lo, v2
+// CHECK: [0x6c,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, tba_hi, v2
+// CHECK: [0x6d,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, tma_lo, v2
+// CHECK: [0x6e,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, tma_hi, v2
+// CHECK: [0x6f,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, ttmp11, v2
+// CHECK: [0x7b,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x34]
+
+v_sub_u32 v5, vcc, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf]
+
+v_sub_u32 v5, vcc, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f]
+
+v_sub_u32 v5, vcc, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x34]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
+
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v255, s[12:13], v1, v2
+// CHECK: [0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, s[14:15], v1, v2
+// CHECK: [0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, s[100:101], v1, v2
+// CHECK: [0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, flat_scratch, v1, v2
+// CHECK: [0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, vcc, v1, v2
+// CHECK: [0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, tba, v1, v2
+// CHECK: [0x05,0x6c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, tma, v1, v2
+// CHECK: [0x05,0x6e,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, ttmp[10:11], v1, v2
+// CHECK: [0x05,0x7a,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v255, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], s1, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], s101, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], flat_scratch_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], flat_scratch_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], vcc_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], vcc_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], tba_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6c,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], tba_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6d,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], tma_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6e,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], tma_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6f,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], ttmp11, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7b,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], m0, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], exec_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], exec_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], 0, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], -1, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], 0.5, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], -4.0, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, v255
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, s2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, s101
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, flat_scratch_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, flat_scratch_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, vcc_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, vcc_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, tba_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd9,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, tba_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xdb,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, tma_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xdd,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, tma_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xdf,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, ttmp11
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xf7,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, m0
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, exec_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, exec_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, 0
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, -1
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, 0.5
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00]
+
+v_sub_u32_e64 v5, s[12:13], v1, -4.0
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
+
+v_sub_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
+
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
+
+v_sub_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
+
+v_subb_u32 v5, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0x0a,0x3a]
+
+v_subb_u32 v255, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0xfe,0x3b]
+
+v_subb_u32 v5, vcc, v255, v2, vcc
+// CHECK: [0xff,0x05,0x0a,0x3a]
+
+v_subb_u32 v5, vcc, 0, v2, vcc
+// CHECK: [0x80,0x04,0x0a,0x3a]
+
+v_subb_u32 v5, vcc, -1, v2, vcc
+// CHECK: [0xc1,0x04,0x0a,0x3a]
+
+v_subb_u32 v5, vcc, 0.5, v2, vcc
+// CHECK: [0xf0,0x04,0x0a,0x3a]
+
+v_subb_u32 v5, vcc, -4.0, v2, vcc
+// CHECK: [0xf7,0x04,0x0a,0x3a]
+
+v_subb_u32 v5, vcc, v1, v255, vcc
+// CHECK: [0x01,0xff,0x0b,0x3a]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
+
+v_subb_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
+
+v_subb_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
+
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v255, s[12:13], v1, v2, s[6:7]
+// CHECK: [0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[14:15], v1, v2, s[6:7]
+// CHECK: [0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[100:101], v1, v2, s[6:7]
+// CHECK: [0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
+// CHECK: [0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, vcc, v1, v2, s[6:7]
+// CHECK: [0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, tba, v1, v2, s[6:7]
+// CHECK: [0x05,0x6c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, tma, v1, v2, s[6:7]
+// CHECK: [0x05,0x6e,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, ttmp[10:11], v1, v2, s[6:7]
+// CHECK: [0x05,0x7a,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v255, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[12:13], 0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[12:13], -1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, v255, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, 0, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, -1, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, s[8:9]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, s[100:101]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, flat_scratch
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, vcc
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, tba
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xb2,0x01]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, tma
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xba,0x01]
+
+v_subb_u32_e64 v5, s[12:13], v1, v2, ttmp[10:11]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xea,0x01]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
+
+v_subb_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
+
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
+
+v_subb_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
+
+v_subbrev_u32 v5, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0x0a,0x3c]
+
+v_subbrev_u32 v255, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0xfe,0x3d]
+
+v_subbrev_u32 v5, vcc, v255, v2, vcc
+// CHECK: [0xff,0x05,0x0a,0x3c]
+
+v_subbrev_u32 v5, vcc, 0, v2, vcc
+// CHECK: [0x80,0x04,0x0a,0x3c]
+
+v_subbrev_u32 v5, vcc, -1, v2, vcc
+// CHECK: [0xc1,0x04,0x0a,0x3c]
+
+v_subbrev_u32 v5, vcc, 0.5, v2, vcc
+// CHECK: [0xf0,0x04,0x0a,0x3c]
+
+v_subbrev_u32 v5, vcc, -4.0, v2, vcc
+// CHECK: [0xf7,0x04,0x0a,0x3c]
+
+v_subbrev_u32 v5, vcc, v1, v255, vcc
+// CHECK: [0x01,0xff,0x0b,0x3c]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
+
+v_subbrev_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
+
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v255, s[12:13], v1, v2, s[6:7]
+// CHECK: [0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[14:15], v1, v2, s[6:7]
+// CHECK: [0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[100:101], v1, v2, s[6:7]
+// CHECK: [0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
+// CHECK: [0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, vcc, v1, v2, s[6:7]
+// CHECK: [0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, tba, v1, v2, s[6:7]
+// CHECK: [0x05,0x6c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, tma, v1, v2, s[6:7]
+// CHECK: [0x05,0x6e,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, ttmp[10:11], v1, v2, s[6:7]
+// CHECK: [0x05,0x7a,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v255, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], 0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], -1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v255, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, 0, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, -1, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, s[8:9]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, s[100:101]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, flat_scratch
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, vcc
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, tba
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xb2,0x01]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, tma
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xba,0x01]
+
+v_subbrev_u32_e64 v5, s[12:13], v1, v2, ttmp[10:11]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xea,0x01]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
+
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
+
+v_subbrev_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
+
+v_subrev_u32 v5, vcc, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x36]
+
+v_subrev_u32 v255, vcc, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x37]
+
+v_subrev_u32 v5, vcc, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, tba_lo, v2
+// CHECK: [0x6c,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, tba_hi, v2
+// CHECK: [0x6d,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, tma_lo, v2
+// CHECK: [0x6e,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, tma_hi, v2
+// CHECK: [0x6f,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, ttmp11, v2
+// CHECK: [0x7b,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x36]
+
+v_subrev_u32 v5, vcc, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf]
+
+v_subrev_u32 v5, vcc, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f]
+
+v_subrev_u32 v5, vcc, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x36]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
+
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v255, s[12:13], v1, v2
+// CHECK: [0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[14:15], v1, v2
+// CHECK: [0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[100:101], v1, v2
+// CHECK: [0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, flat_scratch, v1, v2
+// CHECK: [0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, vcc, v1, v2
+// CHECK: [0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, tba, v1, v2
+// CHECK: [0x05,0x6c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, tma, v1, v2
+// CHECK: [0x05,0x6e,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, ttmp[10:11], v1, v2
+// CHECK: [0x05,0x7a,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v255, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], s1, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], s101, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], flat_scratch_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], flat_scratch_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], vcc_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], vcc_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], tba_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6c,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], tba_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6d,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], tma_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6e,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], tma_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6f,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], ttmp11, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7b,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], m0, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], exec_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], exec_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], 0, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], -1, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], 0.5, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], -4.0, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, v255
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, s2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, s101
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, flat_scratch_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, flat_scratch_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, vcc_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, vcc_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, tba_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd9,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, tba_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xdb,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, tma_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xdd,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, tma_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xdf,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, ttmp11
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xf7,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, m0
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, exec_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, exec_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, 0
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, -1
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, 0.5
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00]
+
+v_subrev_u32_e64 v5, s[12:13], v1, -4.0
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
+
+v_subrev_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
+
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
+
+v_subrev_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]

Modified: llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s?rev=318841&r1=318840&r2=318841&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx9_asm_all.s Wed Nov 22 07:47:27 2017
@@ -106592,3 +106592,3108 @@ v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,1]
 
 v_pk_sub_u16 v5, v1, v2 clamp
 // CHECK: [0x05,0x80,0x8b,0xd3,0x01,0x05,0x02,0x18]
+
+v_add_co_u32 v5, vcc, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x32]
+
+v_add_co_u32 v255, vcc, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x33]
+
+v_add_co_u32 v5, vcc, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x32]
+
+v_add_co_u32 v5, vcc, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf]
+
+v_add_co_u32 v5, vcc, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f]
+
+v_add_co_u32 v5, vcc, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x32]
+
+v_add_co_u32_e64 v5, s[12:13], v1, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v255, s[12:13], v1, v2
+// CHECK: [0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[14:15], v1, v2
+// CHECK: [0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[100:101], v1, v2
+// CHECK: [0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v5, flat_scratch, v1, v2
+// CHECK: [0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v5, vcc, v1, v2
+// CHECK: [0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v255, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], s1, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], s101, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], vcc_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], vcc_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], m0, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], exec_lo, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], exec_hi, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], 0, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], -1, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], 0.5, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], -4.0, v2
+// CHECK: [0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, v255
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, s2
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, s101
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, vcc_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, vcc_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, m0
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, exec_lo
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, exec_hi
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, 0
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, -1
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, 0.5
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00]
+
+v_add_co_u32_e64 v5, s[12:13], v1, -4.0
+// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x65,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x66,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x67,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x6a,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x6b,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x7c,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x7e,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x7f,0x06,0x86,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
+
+v_add_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
+
+v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
+
+v_add_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
+
+v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
+
+v_add_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
+
+v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
+
+v_add_u32 v5, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x68]
+
+v_add_u32 v255, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x69]
+
+v_add_u32 v5, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x68]
+
+v_add_u32 v5, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x68]
+
+v_add_u32 v5, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x68]
+
+v_add_u32 v5, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x68]
+
+v_add_u32 v5, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x68]
+
+v_add_u32 v5, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x68]
+
+v_add_u32 v5, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x68]
+
+v_add_u32 v5, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x68]
+
+v_add_u32 v5, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x68]
+
+v_add_u32 v5, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x68]
+
+v_add_u32 v5, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x68]
+
+v_add_u32 v5, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x68]
+
+v_add_u32 v5, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x68]
+
+v_add_u32 v5, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x68]
+
+v_add_u32 v5, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x68,0x56,0x34,0x12,0xaf]
+
+v_add_u32 v5, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x68,0x73,0x72,0x71,0x3f]
+
+v_add_u32 v5, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x68]
+
+v_add_u32_e64 v5, v1, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v255, v1, v2
+// CHECK: [0xff,0x00,0x34,0xd1,0x01,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, v255, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0xff,0x05,0x02,0x00]
+
+v_add_u32_e64 v5, s1, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, s101, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x65,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, flat_scratch_lo, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x66,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, flat_scratch_hi, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x67,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, vcc_lo, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x6a,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, vcc_hi, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x6b,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, m0, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x7c,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, exec_lo, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x7e,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, exec_hi, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x7f,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, 0, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0x80,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, -1, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0xc1,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, 0.5, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0xf0,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, -4.0, v2
+// CHECK: [0x05,0x00,0x34,0xd1,0xf7,0x04,0x02,0x00]
+
+v_add_u32_e64 v5, v1, v255
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xff,0x03,0x00]
+
+v_add_u32_e64 v5, v1, s2
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x05,0x00,0x00]
+
+v_add_u32_e64 v5, v1, s101
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xcb,0x00,0x00]
+
+v_add_u32_e64 v5, v1, flat_scratch_lo
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xcd,0x00,0x00]
+
+v_add_u32_e64 v5, v1, flat_scratch_hi
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xcf,0x00,0x00]
+
+v_add_u32_e64 v5, v1, vcc_lo
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xd5,0x00,0x00]
+
+v_add_u32_e64 v5, v1, vcc_hi
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xd7,0x00,0x00]
+
+v_add_u32_e64 v5, v1, m0
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xf9,0x00,0x00]
+
+v_add_u32_e64 v5, v1, exec_lo
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xfd,0x00,0x00]
+
+v_add_u32_e64 v5, v1, exec_hi
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xff,0x00,0x00]
+
+v_add_u32_e64 v5, v1, 0
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x01,0x01,0x00]
+
+v_add_u32_e64 v5, v1, -1
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x83,0x01,0x00]
+
+v_add_u32_e64 v5, v1, 0.5
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xe1,0x01,0x00]
+
+v_add_u32_e64 v5, v1, -4.0
+// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xef,0x01,0x00]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x69,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0xff,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x65,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x66,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x67,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x6a,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x6b,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x7c,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x7e,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x7f,0x06,0x86,0x06]
+
+v_add_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x68,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x26,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x00,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x01,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x02,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x03,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x04,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x05,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x0e,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x00,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x01,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x02,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x03,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x04,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x05,0x06]
+
+v_add_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x0e,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x00]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x01]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x02]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x03]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x04]
+
+v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x05]
+
+v_add_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x0e]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00]
+
+v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00]
+
+v_add_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00]
+
+v_add_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f]
+
+v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00]
+
+v_add_i32 v5, v1, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00]
+
+v_add_i32 v255, v1, v2
+// CHECK: [0xff,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00]
+
+v_add_i32 v5, v255, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0xff,0x05,0x02,0x00]
+
+v_add_i32 v5, s1, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x04,0x02,0x00]
+
+v_add_i32 v5, s101, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x65,0x04,0x02,0x00]
+
+v_add_i32 v5, flat_scratch_lo, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x66,0x04,0x02,0x00]
+
+v_add_i32 v5, flat_scratch_hi, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x67,0x04,0x02,0x00]
+
+v_add_i32 v5, vcc_lo, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x6a,0x04,0x02,0x00]
+
+v_add_i32 v5, vcc_hi, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x6b,0x04,0x02,0x00]
+
+v_add_i32 v5, m0, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x7c,0x04,0x02,0x00]
+
+v_add_i32 v5, exec_lo, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x7e,0x04,0x02,0x00]
+
+v_add_i32 v5, exec_hi, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x7f,0x04,0x02,0x00]
+
+v_add_i32 v5, 0, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x80,0x04,0x02,0x00]
+
+v_add_i32 v5, -1, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0xc1,0x04,0x02,0x00]
+
+v_add_i32 v5, 0.5, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0xf0,0x04,0x02,0x00]
+
+v_add_i32 v5, -4.0, v2
+// CHECK: [0x05,0x00,0x9c,0xd2,0xf7,0x04,0x02,0x00]
+
+v_add_i32 v5, v1, v255
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xff,0x03,0x00]
+
+v_add_i32 v5, v1, s2
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x05,0x00,0x00]
+
+v_add_i32 v5, v1, s101
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xcb,0x00,0x00]
+
+v_add_i32 v5, v1, flat_scratch_lo
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xcd,0x00,0x00]
+
+v_add_i32 v5, v1, flat_scratch_hi
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xcf,0x00,0x00]
+
+v_add_i32 v5, v1, vcc_lo
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xd5,0x00,0x00]
+
+v_add_i32 v5, v1, vcc_hi
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xd7,0x00,0x00]
+
+v_add_i32 v5, v1, m0
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xf9,0x00,0x00]
+
+v_add_i32 v5, v1, exec_lo
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xfd,0x00,0x00]
+
+v_add_i32 v5, v1, exec_hi
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xff,0x00,0x00]
+
+v_add_i32 v5, v1, 0
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x01,0x01,0x00]
+
+v_add_i32 v5, v1, -1
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x83,0x01,0x00]
+
+v_add_i32 v5, v1, 0.5
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xe1,0x01,0x00]
+
+v_add_i32 v5, v1, -4.0
+// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xef,0x01,0x00]
+
+v_addc_co_u32 v5, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0x0a,0x38]
+
+v_addc_co_u32 v255, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0xfe,0x39]
+
+v_addc_co_u32 v5, vcc, v255, v2, vcc
+// CHECK: [0xff,0x05,0x0a,0x38]
+
+v_addc_co_u32 v5, vcc, 0, v2, vcc
+// CHECK: [0x80,0x04,0x0a,0x38]
+
+v_addc_co_u32 v5, vcc, -1, v2, vcc
+// CHECK: [0xc1,0x04,0x0a,0x38]
+
+v_addc_co_u32 v5, vcc, 0.5, v2, vcc
+// CHECK: [0xf0,0x04,0x0a,0x38]
+
+v_addc_co_u32 v5, vcc, -4.0, v2, vcc
+// CHECK: [0xf7,0x04,0x0a,0x38]
+
+v_addc_co_u32 v5, vcc, v1, v255, vcc
+// CHECK: [0x01,0xff,0x0b,0x38]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
+
+v_addc_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+
+v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]
+// CHECK: [0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]
+// CHECK: [0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]
+// CHECK: [0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
+// CHECK: [0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, vcc, v1, v2, s[6:7]
+// CHECK: [0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01]
+
+v_addc_co_u32_e64 v5, s[12:13], v1, v2, vcc
+// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
+
+v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
+
+v_addc_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
+
+v_sub_co_u32 v5, vcc, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x34]
+
+v_sub_co_u32 v255, vcc, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x35]
+
+v_sub_co_u32 v5, vcc, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x34]
+
+v_sub_co_u32 v5, vcc, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf]
+
+v_sub_co_u32 v5, vcc, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f]
+
+v_sub_co_u32 v5, vcc, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x34]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
+
+v_sub_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
+
+v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v255, s[12:13], v1, v2
+// CHECK: [0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[14:15], v1, v2
+// CHECK: [0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[100:101], v1, v2
+// CHECK: [0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v5, flat_scratch, v1, v2
+// CHECK: [0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v5, vcc, v1, v2
+// CHECK: [0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v255, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], s1, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], s101, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], vcc_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], vcc_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], m0, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], exec_lo, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], exec_hi, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], 0, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], -1, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], 0.5, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], -4.0, v2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, v255
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, s2
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, s101
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, vcc_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, vcc_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, m0
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, exec_lo
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, exec_hi
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, 0
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, -1
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, 0.5
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00]
+
+v_sub_co_u32_e64 v5, s[12:13], v1, -4.0
+// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x65,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x66,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x67,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x6a,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x6b,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x7c,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x7e,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x7f,0x06,0x86,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
+
+v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
+
+v_sub_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
+
+v_sub_i32 v5, v1, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00]
+
+v_sub_i32 v255, v1, v2
+// CHECK: [0xff,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00]
+
+v_sub_i32 v5, v255, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0xff,0x05,0x02,0x00]
+
+v_sub_i32 v5, s1, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x04,0x02,0x00]
+
+v_sub_i32 v5, s101, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x65,0x04,0x02,0x00]
+
+v_sub_i32 v5, flat_scratch_lo, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x66,0x04,0x02,0x00]
+
+v_sub_i32 v5, flat_scratch_hi, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x67,0x04,0x02,0x00]
+
+v_sub_i32 v5, vcc_lo, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x6a,0x04,0x02,0x00]
+
+v_sub_i32 v5, vcc_hi, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x6b,0x04,0x02,0x00]
+
+v_sub_i32 v5, m0, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x7c,0x04,0x02,0x00]
+
+v_sub_i32 v5, exec_lo, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x7e,0x04,0x02,0x00]
+
+v_sub_i32 v5, exec_hi, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x7f,0x04,0x02,0x00]
+
+v_sub_i32 v5, 0, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x80,0x04,0x02,0x00]
+
+v_sub_i32 v5, -1, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0xc1,0x04,0x02,0x00]
+
+v_sub_i32 v5, 0.5, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0xf0,0x04,0x02,0x00]
+
+v_sub_i32 v5, -4.0, v2
+// CHECK: [0x05,0x00,0x9d,0xd2,0xf7,0x04,0x02,0x00]
+
+v_sub_i32 v5, v1, v255
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xff,0x03,0x00]
+
+v_sub_i32 v5, v1, s2
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x05,0x00,0x00]
+
+v_sub_i32 v5, v1, s101
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xcb,0x00,0x00]
+
+v_sub_i32 v5, v1, flat_scratch_lo
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xcd,0x00,0x00]
+
+v_sub_i32 v5, v1, flat_scratch_hi
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xcf,0x00,0x00]
+
+v_sub_i32 v5, v1, vcc_lo
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xd5,0x00,0x00]
+
+v_sub_i32 v5, v1, vcc_hi
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xd7,0x00,0x00]
+
+v_sub_i32 v5, v1, m0
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xf9,0x00,0x00]
+
+v_sub_i32 v5, v1, exec_lo
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xfd,0x00,0x00]
+
+v_sub_i32 v5, v1, exec_hi
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xff,0x00,0x00]
+
+v_sub_i32 v5, v1, 0
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x01,0x01,0x00]
+
+v_sub_i32 v5, v1, -1
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x83,0x01,0x00]
+
+v_sub_i32 v5, v1, 0.5
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xe1,0x01,0x00]
+
+v_sub_i32 v5, v1, -4.0
+// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xef,0x01,0x00]
+
+v_sub_u32 v5, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x6a]
+
+v_sub_u32 v255, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x6b]
+
+v_sub_u32 v5, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x6a]
+
+v_sub_u32 v5, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x6a]
+
+v_sub_u32 v5, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x6a,0x56,0x34,0x12,0xaf]
+
+v_sub_u32 v5, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x6a,0x73,0x72,0x71,0x3f]
+
+v_sub_u32 v5, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x6a]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f]
+
+v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00]
+
+v_sub_u32_e64 v5, v1, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v255, v1, v2
+// CHECK: [0xff,0x00,0x35,0xd1,0x01,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, v255, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0xff,0x05,0x02,0x00]
+
+v_sub_u32_e64 v5, s1, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, s101, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x65,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, flat_scratch_lo, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x66,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, flat_scratch_hi, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x67,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, vcc_lo, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x6a,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, vcc_hi, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x6b,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, m0, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x7c,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, exec_lo, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x7e,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, exec_hi, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x7f,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, 0, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0x80,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, -1, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0xc1,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, 0.5, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0xf0,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, -4.0, v2
+// CHECK: [0x05,0x00,0x35,0xd1,0xf7,0x04,0x02,0x00]
+
+v_sub_u32_e64 v5, v1, v255
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xff,0x03,0x00]
+
+v_sub_u32_e64 v5, v1, s2
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x05,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, s101
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xcb,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, flat_scratch_lo
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xcd,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, flat_scratch_hi
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xcf,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, vcc_lo
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xd5,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, vcc_hi
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xd7,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, m0
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xf9,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, exec_lo
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xfd,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, exec_hi
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xff,0x00,0x00]
+
+v_sub_u32_e64 v5, v1, 0
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x01,0x01,0x00]
+
+v_sub_u32_e64 v5, v1, -1
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x83,0x01,0x00]
+
+v_sub_u32_e64 v5, v1, 0.5
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xe1,0x01,0x00]
+
+v_sub_u32_e64 v5, v1, -4.0
+// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xef,0x01,0x00]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x6b,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0xff,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x65,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x66,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x67,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x6a,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x6b,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x7c,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x7e,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x7f,0x06,0x86,0x06]
+
+v_sub_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x6a,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x26,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x00,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x01,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x02,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x03,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x04,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x05,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x0e,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x00,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x01,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x02,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x03,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x04,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x05,0x06]
+
+v_sub_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x0e,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x00]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x01]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x02]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x03]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x04]
+
+v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x05]
+
+v_sub_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x0e]
+
+v_subb_co_u32 v5, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0x0a,0x3a]
+
+v_subb_co_u32 v255, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0xfe,0x3b]
+
+v_subb_co_u32 v5, vcc, v255, v2, vcc
+// CHECK: [0xff,0x05,0x0a,0x3a]
+
+v_subb_co_u32 v5, vcc, 0, v2, vcc
+// CHECK: [0x80,0x04,0x0a,0x3a]
+
+v_subb_co_u32 v5, vcc, -1, v2, vcc
+// CHECK: [0xc1,0x04,0x0a,0x3a]
+
+v_subb_co_u32 v5, vcc, 0.5, v2, vcc
+// CHECK: [0xf0,0x04,0x0a,0x3a]
+
+v_subb_co_u32 v5, vcc, -4.0, v2, vcc
+// CHECK: [0xf7,0x04,0x0a,0x3a]
+
+v_subb_co_u32 v5, vcc, v1, v255, vcc
+// CHECK: [0x01,0xff,0x0b,0x3a]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
+
+v_subb_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
+
+v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]
+// CHECK: [0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]
+// CHECK: [0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]
+// CHECK: [0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
+// CHECK: [0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, vcc, v1, v2, s[6:7]
+// CHECK: [0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01]
+
+v_subb_co_u32_e64 v5, s[12:13], v1, v2, vcc
+// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
+
+v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
+
+v_subb_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
+
+v_subbrev_co_u32 v5, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0x0a,0x3c]
+
+v_subbrev_co_u32 v255, vcc, v1, v2, vcc
+// CHECK: [0x01,0x05,0xfe,0x3d]
+
+v_subbrev_co_u32 v5, vcc, v255, v2, vcc
+// CHECK: [0xff,0x05,0x0a,0x3c]
+
+v_subbrev_co_u32 v5, vcc, 0, v2, vcc
+// CHECK: [0x80,0x04,0x0a,0x3c]
+
+v_subbrev_co_u32 v5, vcc, -1, v2, vcc
+// CHECK: [0xc1,0x04,0x0a,0x3c]
+
+v_subbrev_co_u32 v5, vcc, 0.5, v2, vcc
+// CHECK: [0xf0,0x04,0x0a,0x3c]
+
+v_subbrev_co_u32 v5, vcc, -4.0, v2, vcc
+// CHECK: [0xf7,0x04,0x0a,0x3c]
+
+v_subbrev_co_u32 v5, vcc, v1, v255, vcc
+// CHECK: [0x01,0xff,0x0b,0x3c]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
+
+v_subbrev_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
+
+v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]
+// CHECK: [0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]
+// CHECK: [0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]
+// CHECK: [0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
+// CHECK: [0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, vcc, v1, v2, s[6:7]
+// CHECK: [0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01]
+
+v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, vcc
+// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
+
+v_subbrev_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
+
+v_subrev_co_u32 v5, vcc, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x36]
+
+v_subrev_co_u32 v255, vcc, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x37]
+
+v_subrev_co_u32 v5, vcc, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x36]
+
+v_subrev_co_u32 v5, vcc, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf]
+
+v_subrev_co_u32 v5, vcc, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f]
+
+v_subrev_co_u32 v5, vcc, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x36]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
+
+v_subrev_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
+
+v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v255, s[12:13], v1, v2
+// CHECK: [0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[14:15], v1, v2
+// CHECK: [0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[100:101], v1, v2
+// CHECK: [0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, flat_scratch, v1, v2
+// CHECK: [0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, vcc, v1, v2
+// CHECK: [0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v255, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], s1, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], s101, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], vcc_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], vcc_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], m0, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], exec_lo, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], exec_hi, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], 0, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], -1, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], 0.5, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], -4.0, v2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, v255
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, s2
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, s101
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, vcc_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, vcc_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, m0
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, exec_lo
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, exec_hi
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, 0
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, -1
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, 0.5
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00]
+
+v_subrev_co_u32_e64 v5, s[12:13], v1, -4.0
+// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x65,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x66,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x67,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x6a,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x6b,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x7c,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x7e,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x7f,0x06,0x86,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
+
+v_subrev_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]
+
+v_subrev_u32 v5, v1, v2
+// CHECK: [0x01,0x05,0x0a,0x6c]
+
+v_subrev_u32 v255, v1, v2
+// CHECK: [0x01,0x05,0xfe,0x6d]
+
+v_subrev_u32 v5, v255, v2
+// CHECK: [0xff,0x05,0x0a,0x6c]
+
+v_subrev_u32 v5, s1, v2
+// CHECK: [0x01,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, s101, v2
+// CHECK: [0x65,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, flat_scratch_lo, v2
+// CHECK: [0x66,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, flat_scratch_hi, v2
+// CHECK: [0x67,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, vcc_lo, v2
+// CHECK: [0x6a,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, vcc_hi, v2
+// CHECK: [0x6b,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, m0, v2
+// CHECK: [0x7c,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, exec_lo, v2
+// CHECK: [0x7e,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, exec_hi, v2
+// CHECK: [0x7f,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, 0, v2
+// CHECK: [0x80,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, -1, v2
+// CHECK: [0xc1,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, 0.5, v2
+// CHECK: [0xf0,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, -4.0, v2
+// CHECK: [0xf7,0x04,0x0a,0x6c]
+
+v_subrev_u32 v5, 0xaf123456, v2
+// CHECK: [0xff,0x04,0x0a,0x6c,0x56,0x34,0x12,0xaf]
+
+v_subrev_u32 v5, 0x3f717273, v2
+// CHECK: [0xff,0x04,0x0a,0x6c,0x73,0x72,0x71,0x3f]
+
+v_subrev_u32 v5, v1, v255
+// CHECK: [0x01,0xff,0x0b,0x6c]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f]
+
+v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00]
+
+v_subrev_u32_e64 v5, v1, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v255, v1, v2
+// CHECK: [0xff,0x00,0x36,0xd1,0x01,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, v255, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0xff,0x05,0x02,0x00]
+
+v_subrev_u32_e64 v5, s1, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, s101, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x65,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, flat_scratch_lo, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x66,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, flat_scratch_hi, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x67,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, vcc_lo, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x6a,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, vcc_hi, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x6b,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, m0, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x7c,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, exec_lo, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x7e,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, exec_hi, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x7f,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, 0, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0x80,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, -1, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0xc1,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, 0.5, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0xf0,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, -4.0, v2
+// CHECK: [0x05,0x00,0x36,0xd1,0xf7,0x04,0x02,0x00]
+
+v_subrev_u32_e64 v5, v1, v255
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xff,0x03,0x00]
+
+v_subrev_u32_e64 v5, v1, s2
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x05,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, s101
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xcb,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, flat_scratch_lo
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xcd,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, flat_scratch_hi
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xcf,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, vcc_lo
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xd5,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, vcc_hi
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xd7,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, m0
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xf9,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, exec_lo
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xfd,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, exec_hi
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xff,0x00,0x00]
+
+v_subrev_u32_e64 v5, v1, 0
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x01,0x01,0x00]
+
+v_subrev_u32_e64 v5, v1, -1
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x83,0x01,0x00]
+
+v_subrev_u32_e64 v5, v1, 0.5
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xe1,0x01,0x00]
+
+v_subrev_u32_e64 v5, v1, -4.0
+// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xef,0x01,0x00]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x6d,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0xff,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x65,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x66,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x67,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x6a,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x6b,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x7c,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x7e,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x7f,0x06,0x86,0x06]
+
+v_subrev_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x6c,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x26,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x00,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x01,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x02,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x03,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x04,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x05,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x0e,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x00,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x01,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x02,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x03,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x04,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x05,0x06]
+
+v_subrev_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x0e,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x00]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x01]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x02]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x03]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x04]
+
+v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x05]
+
+v_subrev_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x0e]

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt?rev=318841&r1=318840&r2=318841&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt Wed Nov 22 07:47:27 2017
@@ -111164,3 +111164,1686 @@
 
 # CHECK: v_cmpx_t_u32 vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xbe,0x7d,0x01,0x16,0x06,0x0e]
 0xf9,0x04,0xbe,0x7d,0x01,0x16,0x06,0x0e
+
+# CHECK: v_add_u32_e32 v5, vcc, v1, v2    ; encoding: [0x01,0x05,0x0a,0x32]
+0x01,0x05,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v255, vcc, v1, v2    ; encoding: [0x01,0x05,0xfe,0x33]
+0x01,0x05,0xfe,0x33
+
+# CHECK: v_add_u32_e32 v5, vcc, v255, v2    ; encoding: [0xff,0x05,0x0a,0x32]
+0xff,0x05,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, s1, v2    ; encoding: [0x01,0x04,0x0a,0x32]
+0x01,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, s101, v2    ; encoding: [0x65,0x04,0x0a,0x32]
+0x65,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x32]
+0x66,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x32]
+0x67,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x32]
+0x6a,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x32]
+0x6b,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x32]
+0x7c,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x32]
+0x7e,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x32]
+0x7f,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, 0, v2    ; encoding: [0x80,0x04,0x0a,0x32]
+0x80,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x32]
+0xc1,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x32]
+0xf0,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x32]
+0xf7,0x04,0x0a,0x32
+
+# CHECK: v_add_u32_e32 v5, vcc, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf
+
+# CHECK: v_add_u32_e32 v5, vcc, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f
+
+# CHECK: v_add_u32_e32 v5, vcc, v1, v255    ; encoding: [0x01,0xff,0x0b,0x32]
+0x01,0xff,0x0b,0x32
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v255, s[12:13], v1, v2    ; encoding: [0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[14:15], v1, v2    ; encoding: [0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[100:101], v1, v2    ; encoding: [0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, flat_scratch, v1, v2    ; encoding: [0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, vcc, v1, v2    ; encoding: [0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v255, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], s1, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], s101, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], flat_scratch_lo, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], flat_scratch_hi, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], vcc_lo, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], vcc_hi, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], m0, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], exec_lo, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], exec_hi, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], 0, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], -1, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], 0.5, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], -4.0, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, v255    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, s2    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, s101    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, flat_scratch_lo    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, flat_scratch_hi    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, vcc_lo    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, vcc_hi    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, m0    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, exec_lo    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, exec_hi    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, 0    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, -1    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, 0.5    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_add_u32_e64 v5, s[12:13], v1, -4.0    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05
+
+# CHECK: v_add_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e
+
+# CHECK: v_addc_u32_e32 v5, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0x0a,0x38]
+0x01,0x05,0x0a,0x38
+
+# CHECK: v_addc_u32_e32 v255, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0xfe,0x39]
+0x01,0x05,0xfe,0x39
+
+# CHECK: v_addc_u32_e32 v5, vcc, v255, v2, vcc    ; encoding: [0xff,0x05,0x0a,0x38]
+0xff,0x05,0x0a,0x38
+
+# CHECK: v_addc_u32_e32 v5, vcc, 0, v2, vcc    ; encoding: [0x80,0x04,0x0a,0x38]
+0x80,0x04,0x0a,0x38
+
+# CHECK: v_addc_u32_e32 v5, vcc, -1, v2, vcc    ; encoding: [0xc1,0x04,0x0a,0x38]
+0xc1,0x04,0x0a,0x38
+
+# CHECK: v_addc_u32_e32 v5, vcc, 0.5, v2, vcc    ; encoding: [0xf0,0x04,0x0a,0x38]
+0xf0,0x04,0x0a,0x38
+
+# CHECK: v_addc_u32_e32 v5, vcc, -4.0, v2, vcc    ; encoding: [0xf7,0x04,0x0a,0x38]
+0xf7,0x04,0x0a,0x38
+
+# CHECK: v_addc_u32_e32 v5, vcc, v1, v255, vcc    ; encoding: [0x01,0xff,0x0b,0x38]
+0x01,0xff,0x0b,0x38
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00
+
+# CHECK: v_addc_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v255, s[12:13], v1, v2, s[6:7]    ; encoding: [0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[14:15], v1, v2, s[6:7]    ; encoding: [0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[100:101], v1, v2, s[6:7]    ; encoding: [0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, flat_scratch, v1, v2, s[6:7]    ; encoding: [0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, vcc, v1, v2, s[6:7]    ; encoding: [0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v255, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], 0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], -1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, v255, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, 0, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, -1, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, v2, s[8:9]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, v2, s[100:101]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, v2, flat_scratch    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01
+
+# CHECK: v_addc_u32_e64 v5, s[12:13], v1, v2, vcc    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05
+
+# CHECK: v_addc_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e
+
+# CHECK: v_sub_u32_e32 v5, vcc, v1, v2    ; encoding: [0x01,0x05,0x0a,0x34]
+0x01,0x05,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v255, vcc, v1, v2    ; encoding: [0x01,0x05,0xfe,0x35]
+0x01,0x05,0xfe,0x35
+
+# CHECK: v_sub_u32_e32 v5, vcc, v255, v2    ; encoding: [0xff,0x05,0x0a,0x34]
+0xff,0x05,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, s1, v2    ; encoding: [0x01,0x04,0x0a,0x34]
+0x01,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, s101, v2    ; encoding: [0x65,0x04,0x0a,0x34]
+0x65,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x34]
+0x66,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x34]
+0x67,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x34]
+0x6a,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x34]
+0x6b,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x34]
+0x7c,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x34]
+0x7e,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x34]
+0x7f,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, 0, v2    ; encoding: [0x80,0x04,0x0a,0x34]
+0x80,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x34]
+0xc1,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x34]
+0xf0,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x34]
+0xf7,0x04,0x0a,0x34
+
+# CHECK: v_sub_u32_e32 v5, vcc, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf
+
+# CHECK: v_sub_u32_e32 v5, vcc, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f
+
+# CHECK: v_sub_u32_e32 v5, vcc, v1, v255    ; encoding: [0x01,0xff,0x0b,0x34]
+0x01,0xff,0x0b,0x34
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v255, s[12:13], v1, v2    ; encoding: [0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[14:15], v1, v2    ; encoding: [0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[100:101], v1, v2    ; encoding: [0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, flat_scratch, v1, v2    ; encoding: [0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, vcc, v1, v2    ; encoding: [0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v255, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], s1, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], s101, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], flat_scratch_lo, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], flat_scratch_hi, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], vcc_lo, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], vcc_hi, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], m0, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], exec_lo, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], exec_hi, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], 0, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], -1, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], 0.5, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], -4.0, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, v255    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, s2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, s101    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, flat_scratch_lo    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, flat_scratch_hi    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, vcc_lo    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, vcc_hi    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, m0    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, exec_lo    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, exec_hi    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, 0    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, -1    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, 0.5    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_sub_u32_e64 v5, s[12:13], v1, -4.0    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05
+
+# CHECK: v_sub_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subb_u32_e32 v5, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0x0a,0x3a]
+0x01,0x05,0x0a,0x3a
+
+# CHECK: v_subb_u32_e32 v255, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0xfe,0x3b]
+0x01,0x05,0xfe,0x3b
+
+# CHECK: v_subb_u32_e32 v5, vcc, v255, v2, vcc    ; encoding: [0xff,0x05,0x0a,0x3a]
+0xff,0x05,0x0a,0x3a
+
+# CHECK: v_subb_u32_e32 v5, vcc, 0, v2, vcc    ; encoding: [0x80,0x04,0x0a,0x3a]
+0x80,0x04,0x0a,0x3a
+
+# CHECK: v_subb_u32_e32 v5, vcc, -1, v2, vcc    ; encoding: [0xc1,0x04,0x0a,0x3a]
+0xc1,0x04,0x0a,0x3a
+
+# CHECK: v_subb_u32_e32 v5, vcc, 0.5, v2, vcc    ; encoding: [0xf0,0x04,0x0a,0x3a]
+0xf0,0x04,0x0a,0x3a
+
+# CHECK: v_subb_u32_e32 v5, vcc, -4.0, v2, vcc    ; encoding: [0xf7,0x04,0x0a,0x3a]
+0xf7,0x04,0x0a,0x3a
+
+# CHECK: v_subb_u32_e32 v5, vcc, v1, v255, vcc    ; encoding: [0x01,0xff,0x0b,0x3a]
+0x01,0xff,0x0b,0x3a
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subb_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v255, s[12:13], v1, v2, s[6:7]    ; encoding: [0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[14:15], v1, v2, s[6:7]    ; encoding: [0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[100:101], v1, v2, s[6:7]    ; encoding: [0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, flat_scratch, v1, v2, s[6:7]    ; encoding: [0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, vcc, v1, v2, s[6:7]    ; encoding: [0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v255, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], 0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], -1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, v255, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, 0, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, -1, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, v2, s[8:9]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, v2, s[100:101]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, v2, flat_scratch    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01
+
+# CHECK: v_subb_u32_e64 v5, s[12:13], v1, v2, vcc    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05
+
+# CHECK: v_subb_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0x0a,0x3c]
+0x01,0x05,0x0a,0x3c
+
+# CHECK: v_subbrev_u32_e32 v255, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0xfe,0x3d]
+0x01,0x05,0xfe,0x3d
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, v255, v2, vcc    ; encoding: [0xff,0x05,0x0a,0x3c]
+0xff,0x05,0x0a,0x3c
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, 0, v2, vcc    ; encoding: [0x80,0x04,0x0a,0x3c]
+0x80,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, -1, v2, vcc    ; encoding: [0xc1,0x04,0x0a,0x3c]
+0xc1,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, 0.5, v2, vcc    ; encoding: [0xf0,0x04,0x0a,0x3c]
+0xf0,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, -4.0, v2, vcc    ; encoding: [0xf7,0x04,0x0a,0x3c]
+0xf7,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_u32_e32 v5, vcc, v1, v255, vcc    ; encoding: [0x01,0xff,0x0b,0x3c]
+0x01,0xff,0x0b,0x3c
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v255, s[12:13], v1, v2, s[6:7]    ; encoding: [0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[14:15], v1, v2, s[6:7]    ; encoding: [0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[100:101], v1, v2, s[6:7]    ; encoding: [0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, flat_scratch, v1, v2, s[6:7]    ; encoding: [0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, vcc, v1, v2, s[6:7]    ; encoding: [0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v255, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], 0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], -1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, v255, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, 0, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, -1, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, v2, s[8:9]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, v2, s[100:101]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, v2, flat_scratch    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01
+
+# CHECK: v_subbrev_u32_e64 v5, s[12:13], v1, v2, vcc    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05
+
+# CHECK: v_subbrev_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subrev_u32_e32 v5, vcc, v1, v2    ; encoding: [0x01,0x05,0x0a,0x36]
+0x01,0x05,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v255, vcc, v1, v2    ; encoding: [0x01,0x05,0xfe,0x37]
+0x01,0x05,0xfe,0x37
+
+# CHECK: v_subrev_u32_e32 v5, vcc, v255, v2    ; encoding: [0xff,0x05,0x0a,0x36]
+0xff,0x05,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, s1, v2    ; encoding: [0x01,0x04,0x0a,0x36]
+0x01,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, s101, v2    ; encoding: [0x65,0x04,0x0a,0x36]
+0x65,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x36]
+0x66,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x36]
+0x67,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x36]
+0x6a,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x36]
+0x6b,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x36]
+0x7c,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x36]
+0x7e,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x36]
+0x7f,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, 0, v2    ; encoding: [0x80,0x04,0x0a,0x36]
+0x80,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x36]
+0xc1,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x36]
+0xf0,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x36]
+0xf7,0x04,0x0a,0x36
+
+# CHECK: v_subrev_u32_e32 v5, vcc, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf
+
+# CHECK: v_subrev_u32_e32 v5, vcc, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f
+
+# CHECK: v_subrev_u32_e32 v5, vcc, v1, v255    ; encoding: [0x01,0xff,0x0b,0x36]
+0x01,0xff,0x0b,0x36
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v255, s[12:13], v1, v2    ; encoding: [0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[14:15], v1, v2    ; encoding: [0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[100:101], v1, v2    ; encoding: [0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, flat_scratch, v1, v2    ; encoding: [0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, vcc, v1, v2    ; encoding: [0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v255, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], s1, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], s101, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], flat_scratch_lo, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], flat_scratch_hi, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], vcc_lo, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], vcc_hi, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], m0, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], exec_lo, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], exec_hi, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], 0, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], -1, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], 0.5, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], -4.0, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, v255    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, s2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, s101    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, flat_scratch_lo    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, flat_scratch_hi    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, vcc_lo    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, vcc_hi    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, m0    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, exec_lo    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, exec_hi    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, 0    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, -1    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, 0.5    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s[12:13], v1, -4.0    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05
+
+# CHECK: v_subrev_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt?rev=318841&r1=318840&r2=318841&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt Wed Nov 22 07:47:27 2017
@@ -90446,3 +90446,2922 @@
 
 # CHECK: v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[1,1,1]    ; encoding: [0x05,0x58,0x9a,0xd2,0x01,0x05,0x02,0x00]
 0x05,0x58,0x9a,0xd2,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e32 v5, vcc, v1, v2    ; encoding: [0x01,0x05,0x0a,0x32]
+0x01,0x05,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v255, vcc, v1, v2    ; encoding: [0x01,0x05,0xfe,0x33]
+0x01,0x05,0xfe,0x33
+
+# CHECK: v_add_co_u32_e32 v5, vcc, v255, v2    ; encoding: [0xff,0x05,0x0a,0x32]
+0xff,0x05,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, s1, v2    ; encoding: [0x01,0x04,0x0a,0x32]
+0x01,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, s101, v2    ; encoding: [0x65,0x04,0x0a,0x32]
+0x65,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x32]
+0x66,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x32]
+0x67,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x32]
+0x6a,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x32]
+0x6b,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x32]
+0x7c,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x32]
+0x7e,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x32]
+0x7f,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, 0, v2    ; encoding: [0x80,0x04,0x0a,0x32]
+0x80,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x32]
+0xc1,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x32]
+0xf0,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x32]
+0xf7,0x04,0x0a,0x32
+
+# CHECK: v_add_co_u32_e32 v5, vcc, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf
+
+# CHECK: v_add_co_u32_e32 v5, vcc, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f
+
+# CHECK: v_add_co_u32_e32 v5, vcc, v1, v255    ; encoding: [0x01,0xff,0x0b,0x32]
+0x01,0xff,0x0b,0x32
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v255, s[12:13], v1, v2    ; encoding: [0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[14:15], v1, v2    ; encoding: [0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[100:101], v1, v2    ; encoding: [0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, flat_scratch, v1, v2    ; encoding: [0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, vcc, v1, v2    ; encoding: [0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v255, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], s1, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], s101, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], vcc_lo, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], vcc_hi, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], m0, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], exec_lo, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], exec_hi, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], 0, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], -1, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], 0.5, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], -4.0, v2    ; encoding: [0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, v255    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, s2    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, s101    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, vcc_lo    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, vcc_hi    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, m0    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, exec_lo    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, exec_hi    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, 0    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, -1    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, 0.5    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_add_co_u32_e64 v5, s[12:13], v1, -4.0    ; encoding: [0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x65,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x65,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x66,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x66,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x67,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x67,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x6a,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x6a,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x6b,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x6b,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x7c,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x7c,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x7e,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x7e,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x7f,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x32,0x7f,0x06,0x86,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05
+
+# CHECK: v_add_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00
+
+# CHECK: v_add_u32_e32 v5, v1, v2    ; encoding: [0x01,0x05,0x0a,0x68]
+0x01,0x05,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v255, v1, v2    ; encoding: [0x01,0x05,0xfe,0x69]
+0x01,0x05,0xfe,0x69
+
+# CHECK: v_add_u32_e32 v5, v255, v2    ; encoding: [0xff,0x05,0x0a,0x68]
+0xff,0x05,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, s1, v2    ; encoding: [0x01,0x04,0x0a,0x68]
+0x01,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, s101, v2    ; encoding: [0x65,0x04,0x0a,0x68]
+0x65,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x68]
+0x66,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x68]
+0x67,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x68]
+0x6a,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x68]
+0x6b,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x68]
+0x7c,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x68]
+0x7e,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x68]
+0x7f,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, 0, v2    ; encoding: [0x80,0x04,0x0a,0x68]
+0x80,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x68]
+0xc1,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x68]
+0xf0,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x68]
+0xf7,0x04,0x0a,0x68
+
+# CHECK: v_add_u32_e32 v5, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x68,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x68,0x56,0x34,0x12,0xaf
+
+# CHECK: v_add_u32_e32 v5, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x68,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x68,0x73,0x72,0x71,0x3f
+
+# CHECK: v_add_u32_e32 v5, v1, v255    ; encoding: [0x01,0xff,0x0b,0x68]
+0x01,0xff,0x0b,0x68
+
+# CHECK: v_add_u32_e64 v5, v1, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v255, v1, v2    ; encoding: [0xff,0x00,0x34,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x00,0x34,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, v255, v2    ; encoding: [0x05,0x00,0x34,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x00,0x34,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s1, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, s101, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, flat_scratch_lo, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, flat_scratch_hi, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, vcc_lo, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, vcc_hi, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, m0, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, exec_lo, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, exec_hi, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, 0, v2    ; encoding: [0x05,0x00,0x34,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, -1, v2    ; encoding: [0x05,0x00,0x34,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, 0.5, v2    ; encoding: [0x05,0x00,0x34,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, -4.0, v2    ; encoding: [0x05,0x00,0x34,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x00,0x34,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, v255    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, s2    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, s101    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, flat_scratch_lo    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, flat_scratch_hi    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, vcc_lo    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, vcc_hi    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, m0    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, exec_lo    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, exec_hi    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, 0    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x00,0x34,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, -1    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x00,0x34,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, 0.5    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_add_u32_e64 v5, v1, -4.0    ; encoding: [0x05,0x00,0x34,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x00,0x34,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x69,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x69,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0xff,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x65,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x65,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x66,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x66,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x67,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x67,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x6a,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x6a,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x6b,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x6b,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x7c,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x7c,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x7e,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x7e,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x7f,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x68,0x7f,0x06,0x86,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x68,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x68,0x01,0x06,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x26,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x00,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x01,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x02,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x03,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x04,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x05,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x0e,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x00,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x01,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x02,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x03,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x04,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x05,0x06
+
+# CHECK: v_add_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x0e,0x06
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x00
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x01
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x02
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x03
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x04
+
+# CHECK: v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x05
+
+# CHECK: v_add_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x0e
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00
+
+# CHECK: v_add_i32 v5, v1, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_i32 v255, v1, v2    ; encoding: [0xff,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00]
+0xff,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00
+
+# CHECK: v_add_i32 v5, v255, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0xff,0x05,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0xff,0x05,0x02,0x00
+
+# CHECK: v_add_i32 v5, s1, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, s101, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x65,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x65,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, flat_scratch_lo, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x66,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x66,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, flat_scratch_hi, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x67,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x67,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, vcc_lo, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x6a,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x6a,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, vcc_hi, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x6b,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x6b,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, m0, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x7c,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x7c,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, exec_lo, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x7e,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x7e,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, exec_hi, v2    ; encoding: [0x05,0x00,0x9c,0xd2,0x7f,0x04,0x02,0x00]
+0x05,0x00,0x9c,0xd2,0x7f,0x04,0x02,0x00
+
+# CHECK: v_add_i32 v5, v1, v255    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xff,0x03,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xff,0x03,0x00
+
+# CHECK: v_add_i32 v5, v1, s2    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0x05,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0x05,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, s101    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xcb,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xcb,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, flat_scratch_lo    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xcd,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xcd,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, flat_scratch_hi    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xcf,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xcf,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, vcc_lo    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xd5,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xd5,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, vcc_hi    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xd7,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xd7,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, m0    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xf9,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xf9,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, exec_lo    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xfd,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xfd,0x00,0x00
+
+# CHECK: v_add_i32 v5, v1, exec_hi    ; encoding: [0x05,0x00,0x9c,0xd2,0x01,0xff,0x00,0x00]
+0x05,0x00,0x9c,0xd2,0x01,0xff,0x00,0x00
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0x0a,0x38]
+0x01,0x05,0x0a,0x38
+
+# CHECK: v_addc_co_u32_e32 v255, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0xfe,0x39]
+0x01,0x05,0xfe,0x39
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, v255, v2, vcc    ; encoding: [0xff,0x05,0x0a,0x38]
+0xff,0x05,0x0a,0x38
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, 0, v2, vcc    ; encoding: [0x80,0x04,0x0a,0x38]
+0x80,0x04,0x0a,0x38
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, -1, v2, vcc    ; encoding: [0xc1,0x04,0x0a,0x38]
+0xc1,0x04,0x0a,0x38
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, 0.5, v2, vcc    ; encoding: [0xf0,0x04,0x0a,0x38]
+0xf0,0x04,0x0a,0x38
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, -4.0, v2, vcc    ; encoding: [0xf7,0x04,0x0a,0x38]
+0xf7,0x04,0x0a,0x38
+
+# CHECK: v_addc_co_u32_e32 v5, vcc, v1, v255, vcc    ; encoding: [0x01,0xff,0x0b,0x38]
+0x01,0xff,0x0b,0x38
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00
+
+# CHECK: v_addc_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]    ; encoding: [0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]    ; encoding: [0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]    ; encoding: [0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]    ; encoding: [0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, vcc, v1, v2, s[6:7]    ; encoding: [0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00]
+0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01
+
+# CHECK: v_addc_co_u32_e64 v5, s[12:13], v1, v2, vcc    ; encoding: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01]
+0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05
+
+# CHECK: v_addc_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, v1, v2    ; encoding: [0x01,0x05,0x0a,0x34]
+0x01,0x05,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v255, vcc, v1, v2    ; encoding: [0x01,0x05,0xfe,0x35]
+0x01,0x05,0xfe,0x35
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, v255, v2    ; encoding: [0xff,0x05,0x0a,0x34]
+0xff,0x05,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, s1, v2    ; encoding: [0x01,0x04,0x0a,0x34]
+0x01,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, s101, v2    ; encoding: [0x65,0x04,0x0a,0x34]
+0x65,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x34]
+0x66,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x34]
+0x67,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x34]
+0x6a,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x34]
+0x6b,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x34]
+0x7c,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x34]
+0x7e,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x34]
+0x7f,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, 0, v2    ; encoding: [0x80,0x04,0x0a,0x34]
+0x80,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x34]
+0xc1,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x34]
+0xf0,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x34]
+0xf7,0x04,0x0a,0x34
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f
+
+# CHECK: v_sub_co_u32_e32 v5, vcc, v1, v255    ; encoding: [0x01,0xff,0x0b,0x34]
+0x01,0xff,0x0b,0x34
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v255, s[12:13], v1, v2    ; encoding: [0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[14:15], v1, v2    ; encoding: [0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[100:101], v1, v2    ; encoding: [0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, flat_scratch, v1, v2    ; encoding: [0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, vcc, v1, v2    ; encoding: [0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v255, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], s1, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], s101, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], vcc_lo, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], vcc_hi, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], m0, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], exec_lo, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], exec_hi, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], 0, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], -1, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], 0.5, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], -4.0, v2    ; encoding: [0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, v255    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, s2    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, s101    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, vcc_lo    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, vcc_hi    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, m0    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, exec_lo    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, exec_hi    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, 0    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, -1    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, 0.5    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_sub_co_u32_e64 v5, s[12:13], v1, -4.0    ; encoding: [0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x65,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x65,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x66,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x66,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x67,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x67,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x6a,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x6a,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x6b,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x6b,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x7c,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x7c,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x7e,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x7e,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x7f,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x34,0x7f,0x06,0x86,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05
+
+# CHECK: v_sub_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e
+
+# CHECK: v_sub_i32 v5, v1, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_i32 v255, v1, v2    ; encoding: [0xff,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00]
+0xff,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_i32 v5, v255, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0xff,0x05,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0xff,0x05,0x02,0x00
+
+# CHECK: v_sub_i32 v5, s1, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, s101, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x65,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x65,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, flat_scratch_lo, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x66,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x66,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, flat_scratch_hi, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x67,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x67,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, vcc_lo, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x6a,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x6a,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, vcc_hi, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x6b,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x6b,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, m0, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x7c,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x7c,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, exec_lo, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x7e,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x7e,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, exec_hi, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x7f,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x7f,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, 0, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0x80,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0x80,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, -1, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0xc1,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0xc1,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, 0.5, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0xf0,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0xf0,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, -4.0, v2    ; encoding: [0x05,0x00,0x9d,0xd2,0xf7,0x04,0x02,0x00]
+0x05,0x00,0x9d,0xd2,0xf7,0x04,0x02,0x00
+
+# CHECK: v_sub_i32 v5, v1, v255    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xff,0x03,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xff,0x03,0x00
+
+# CHECK: v_sub_i32 v5, v1, s2    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0x05,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0x05,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, s101    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xcb,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xcb,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, flat_scratch_lo    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xcd,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xcd,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, flat_scratch_hi    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xcf,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xcf,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, vcc_lo    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xd5,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xd5,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, vcc_hi    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xd7,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xd7,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, m0    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xf9,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xf9,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, exec_lo    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xfd,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xfd,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, exec_hi    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xff,0x00,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xff,0x00,0x00
+
+# CHECK: v_sub_i32 v5, v1, 0    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0x01,0x01,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_i32 v5, v1, -1    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0x83,0x01,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0x83,0x01,0x00
+
+# CHECK: v_sub_i32 v5, v1, 0.5    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xe1,0x01,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xe1,0x01,0x00
+
+# CHECK: v_sub_i32 v5, v1, -4.0    ; encoding: [0x05,0x00,0x9d,0xd2,0x01,0xef,0x01,0x00]
+0x05,0x00,0x9d,0xd2,0x01,0xef,0x01,0x00
+
+# CHECK: v_sub_u32_e32 v5, v1, v2    ; encoding: [0x01,0x05,0x0a,0x6a]
+0x01,0x05,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v255, v1, v2    ; encoding: [0x01,0x05,0xfe,0x6b]
+0x01,0x05,0xfe,0x6b
+
+# CHECK: v_sub_u32_e32 v5, v255, v2    ; encoding: [0xff,0x05,0x0a,0x6a]
+0xff,0x05,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, s1, v2    ; encoding: [0x01,0x04,0x0a,0x6a]
+0x01,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, s101, v2    ; encoding: [0x65,0x04,0x0a,0x6a]
+0x65,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x6a]
+0x66,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x6a]
+0x67,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x6a]
+0x6a,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x6a]
+0x6b,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x6a]
+0x7c,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x6a]
+0x7e,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x6a]
+0x7f,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, 0, v2    ; encoding: [0x80,0x04,0x0a,0x6a]
+0x80,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x6a]
+0xc1,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x6a]
+0xf0,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x6a]
+0xf7,0x04,0x0a,0x6a
+
+# CHECK: v_sub_u32_e32 v5, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x6a,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x6a,0x56,0x34,0x12,0xaf
+
+# CHECK: v_sub_u32_e32 v5, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x6a,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x6a,0x73,0x72,0x71,0x3f
+
+# CHECK: v_sub_u32_e32 v5, v1, v255    ; encoding: [0x01,0xff,0x0b,0x6a]
+0x01,0xff,0x0b,0x6a
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v255, v1, v2    ; encoding: [0xff,0x00,0x35,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x00,0x35,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, v255, v2    ; encoding: [0x05,0x00,0x35,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x00,0x35,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s1, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, s101, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, flat_scratch_lo, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, flat_scratch_hi, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, vcc_lo, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, vcc_hi, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, m0, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, exec_lo, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, exec_hi, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, 0, v2    ; encoding: [0x05,0x00,0x35,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, -1, v2    ; encoding: [0x05,0x00,0x35,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, 0.5, v2    ; encoding: [0x05,0x00,0x35,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, -4.0, v2    ; encoding: [0x05,0x00,0x35,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x00,0x35,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, v255    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, s2    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, s101    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, flat_scratch_lo    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, flat_scratch_hi    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, vcc_lo    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, vcc_hi    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, m0    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, exec_lo    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, exec_hi    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, 0    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x00,0x35,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, -1    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x00,0x35,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, 0.5    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_sub_u32_e64 v5, v1, -4.0    ; encoding: [0x05,0x00,0x35,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x00,0x35,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x6b,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x6b,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0xff,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x65,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x65,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x66,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x66,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x67,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x67,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x6a,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x6a,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x6b,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x6b,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x7c,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x7c,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x7e,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x7e,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x7f,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6a,0x7f,0x06,0x86,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x6a,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x6a,0x01,0x06,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x26,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x00,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x01,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x02,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x03,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x04,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x05,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x0e,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x00,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x01,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x02,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x03,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x04,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x05,0x06
+
+# CHECK: v_sub_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x0e,0x06
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x00
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x01
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x02
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x03
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x04
+
+# CHECK: v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x05
+
+# CHECK: v_sub_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0x0a,0x3a]
+0x01,0x05,0x0a,0x3a
+
+# CHECK: v_subb_co_u32_e32 v255, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0xfe,0x3b]
+0x01,0x05,0xfe,0x3b
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, v255, v2, vcc    ; encoding: [0xff,0x05,0x0a,0x3a]
+0xff,0x05,0x0a,0x3a
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, 0, v2, vcc    ; encoding: [0x80,0x04,0x0a,0x3a]
+0x80,0x04,0x0a,0x3a
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, -1, v2, vcc    ; encoding: [0xc1,0x04,0x0a,0x3a]
+0xc1,0x04,0x0a,0x3a
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, 0.5, v2, vcc    ; encoding: [0xf0,0x04,0x0a,0x3a]
+0xf0,0x04,0x0a,0x3a
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, -4.0, v2, vcc    ; encoding: [0xf7,0x04,0x0a,0x3a]
+0xf7,0x04,0x0a,0x3a
+
+# CHECK: v_subb_co_u32_e32 v5, vcc, v1, v255, vcc    ; encoding: [0x01,0xff,0x0b,0x3a]
+0x01,0xff,0x0b,0x3a
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subb_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]    ; encoding: [0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]    ; encoding: [0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]    ; encoding: [0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]    ; encoding: [0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, vcc, v1, v2, s[6:7]    ; encoding: [0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00]
+0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01
+
+# CHECK: v_subb_co_u32_e64 v5, s[12:13], v1, v2, vcc    ; encoding: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01]
+0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05
+
+# CHECK: v_subb_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0x0a,0x3c]
+0x01,0x05,0x0a,0x3c
+
+# CHECK: v_subbrev_co_u32_e32 v255, vcc, v1, v2, vcc    ; encoding: [0x01,0x05,0xfe,0x3d]
+0x01,0x05,0xfe,0x3d
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, v255, v2, vcc    ; encoding: [0xff,0x05,0x0a,0x3c]
+0xff,0x05,0x0a,0x3c
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, 0, v2, vcc    ; encoding: [0x80,0x04,0x0a,0x3c]
+0x80,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, -1, v2, vcc    ; encoding: [0xc1,0x04,0x0a,0x3c]
+0xc1,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, 0.5, v2, vcc    ; encoding: [0xf0,0x04,0x0a,0x3c]
+0xf0,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, -4.0, v2, vcc    ; encoding: [0xf7,0x04,0x0a,0x3c]
+0xf7,0x04,0x0a,0x3c
+
+# CHECK: v_subbrev_co_u32_e32 v5, vcc, v1, v255, vcc    ; encoding: [0x01,0xff,0x0b,0x3c]
+0x01,0xff,0x0b,0x3c
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]    ; encoding: [0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]    ; encoding: [0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]    ; encoding: [0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]    ; encoding: [0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, vcc, v1, v2, s[6:7]    ; encoding: [0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00]
+0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00]
+0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01
+
+# CHECK: v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, vcc    ; encoding: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01]
+0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05
+
+# CHECK: v_subbrev_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, v1, v2    ; encoding: [0x01,0x05,0x0a,0x36]
+0x01,0x05,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v255, vcc, v1, v2    ; encoding: [0x01,0x05,0xfe,0x37]
+0x01,0x05,0xfe,0x37
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, v255, v2    ; encoding: [0xff,0x05,0x0a,0x36]
+0xff,0x05,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, s1, v2    ; encoding: [0x01,0x04,0x0a,0x36]
+0x01,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, s101, v2    ; encoding: [0x65,0x04,0x0a,0x36]
+0x65,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x36]
+0x66,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x36]
+0x67,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x36]
+0x6a,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x36]
+0x6b,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x36]
+0x7c,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x36]
+0x7e,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x36]
+0x7f,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, 0, v2    ; encoding: [0x80,0x04,0x0a,0x36]
+0x80,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x36]
+0xc1,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x36]
+0xf0,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x36]
+0xf7,0x04,0x0a,0x36
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f
+
+# CHECK: v_subrev_co_u32_e32 v5, vcc, v1, v255    ; encoding: [0x01,0xff,0x0b,0x36]
+0x01,0xff,0x0b,0x36
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v255, s[12:13], v1, v2    ; encoding: [0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[14:15], v1, v2    ; encoding: [0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[100:101], v1, v2    ; encoding: [0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, flat_scratch, v1, v2    ; encoding: [0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, vcc, v1, v2    ; encoding: [0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v255, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], s1, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], s101, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], vcc_lo, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], vcc_hi, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], m0, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], exec_lo, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], exec_hi, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], 0, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], -1, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], 0.5, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], -4.0, v2    ; encoding: [0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, v255    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, s2    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, s101    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, vcc_lo    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, vcc_hi    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, m0    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, exec_lo    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, exec_hi    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, 0    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, -1    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, 0.5    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_subrev_co_u32_e64 v5, s[12:13], v1, -4.0    ; encoding: [0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x65,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x65,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x66,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x66,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x67,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x67,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x6a,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x6a,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x6b,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x6b,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x7c,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x7c,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x7e,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x7e,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x7f,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x36,0x7f,0x06,0x86,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05
+
+# CHECK: v_subrev_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e
+
+# CHECK: v_subrev_u32_e32 v5, v1, v2    ; encoding: [0x01,0x05,0x0a,0x6c]
+0x01,0x05,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v255, v1, v2    ; encoding: [0x01,0x05,0xfe,0x6d]
+0x01,0x05,0xfe,0x6d
+
+# CHECK: v_subrev_u32_e32 v5, v255, v2    ; encoding: [0xff,0x05,0x0a,0x6c]
+0xff,0x05,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, s1, v2    ; encoding: [0x01,0x04,0x0a,0x6c]
+0x01,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, s101, v2    ; encoding: [0x65,0x04,0x0a,0x6c]
+0x65,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, flat_scratch_lo, v2    ; encoding: [0x66,0x04,0x0a,0x6c]
+0x66,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, flat_scratch_hi, v2    ; encoding: [0x67,0x04,0x0a,0x6c]
+0x67,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, vcc_lo, v2    ; encoding: [0x6a,0x04,0x0a,0x6c]
+0x6a,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, vcc_hi, v2    ; encoding: [0x6b,0x04,0x0a,0x6c]
+0x6b,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, m0, v2    ; encoding: [0x7c,0x04,0x0a,0x6c]
+0x7c,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, exec_lo, v2    ; encoding: [0x7e,0x04,0x0a,0x6c]
+0x7e,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, exec_hi, v2    ; encoding: [0x7f,0x04,0x0a,0x6c]
+0x7f,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, 0, v2    ; encoding: [0x80,0x04,0x0a,0x6c]
+0x80,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, -1, v2    ; encoding: [0xc1,0x04,0x0a,0x6c]
+0xc1,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, 0.5, v2    ; encoding: [0xf0,0x04,0x0a,0x6c]
+0xf0,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, -4.0, v2    ; encoding: [0xf7,0x04,0x0a,0x6c]
+0xf7,0x04,0x0a,0x6c
+
+# CHECK: v_subrev_u32_e32 v5, 0xaf123456, v2    ; encoding: [0xff,0x04,0x0a,0x6c,0x56,0x34,0x12,0xaf]
+0xff,0x04,0x0a,0x6c,0x56,0x34,0x12,0xaf
+
+# CHECK: v_subrev_u32_e32 v5, 0x3f717273, v2    ; encoding: [0xff,0x04,0x0a,0x6c,0x73,0x72,0x71,0x3f]
+0xff,0x04,0x0a,0x6c,0x73,0x72,0x71,0x3f
+
+# CHECK: v_subrev_u32_e32 v5, v1, v255    ; encoding: [0x01,0xff,0x0b,0x6c]
+0x01,0xff,0x0b,0x6c
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00]
+0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00]
+0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00]
+0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f
+
+# CHECK: v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0    ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0x05,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v255, v1, v2    ; encoding: [0xff,0x00,0x36,0xd1,0x01,0x05,0x02,0x00]
+0xff,0x00,0x36,0xd1,0x01,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v255, v2    ; encoding: [0x05,0x00,0x36,0xd1,0xff,0x05,0x02,0x00]
+0x05,0x00,0x36,0xd1,0xff,0x05,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s1, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x01,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, s101, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x65,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x65,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, flat_scratch_lo, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x66,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x66,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, flat_scratch_hi, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x67,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x67,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, vcc_lo, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x6a,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x6a,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, vcc_hi, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x6b,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x6b,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, m0, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x7c,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x7c,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, exec_lo, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x7e,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x7e,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, exec_hi, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x7f,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x7f,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, 0, v2    ; encoding: [0x05,0x00,0x36,0xd1,0x80,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0x80,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, -1, v2    ; encoding: [0x05,0x00,0x36,0xd1,0xc1,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0xc1,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, 0.5, v2    ; encoding: [0x05,0x00,0x36,0xd1,0xf0,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0xf0,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, -4.0, v2    ; encoding: [0x05,0x00,0x36,0xd1,0xf7,0x04,0x02,0x00]
+0x05,0x00,0x36,0xd1,0xf7,0x04,0x02,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, v255    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xff,0x03,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xff,0x03,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, s2    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0x05,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0x05,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, s101    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xcb,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xcb,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, flat_scratch_lo    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xcd,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xcd,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, flat_scratch_hi    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xcf,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xcf,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, vcc_lo    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xd5,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xd5,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, vcc_hi    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xd7,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xd7,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, m0    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xf9,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xf9,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, exec_lo    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xfd,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xfd,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, exec_hi    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xff,0x00,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xff,0x00,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, 0    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0x01,0x01,0x00]
+0x05,0x00,0x36,0xd1,0x01,0x01,0x01,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, -1    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0x83,0x01,0x00]
+0x05,0x00,0x36,0xd1,0x01,0x83,0x01,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, 0.5    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xe1,0x01,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xe1,0x01,0x00
+
+# CHECK: v_subrev_u32_e64 v5, v1, -4.0    ; encoding: [0x05,0x00,0x36,0xd1,0x01,0xef,0x01,0x00]
+0x05,0x00,0x36,0xd1,0x01,0xef,0x01,0x00
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0xfe,0x6d,0x01,0x06,0x06,0x06]
+0xf9,0x04,0xfe,0x6d,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0xff,0x06,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0xff,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x65,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x65,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x66,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x66,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x67,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x67,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x6a,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x6a,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x6b,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x6b,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x7c,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x7c,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x7e,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x7e,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x7f,0x06,0x86,0x06]
+0xf9,0x04,0x0a,0x6c,0x7f,0x06,0x86,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0xfe,0x0b,0x6c,0x01,0x06,0x06,0x06]
+0xf9,0xfe,0x0b,0x6c,0x01,0x06,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x26,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x26,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x00,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x00,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x01,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x01,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x02,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x02,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x03,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x03,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x04,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x04,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x05,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x05,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x0e,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x0e,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x00,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x00,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x01,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x01,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x02,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x02,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x03,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x03,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x04,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x04,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x05,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x05,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x0e,0x06]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x0e,0x06
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x00]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x00
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x01]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x01
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x02]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x02
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x03]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x03
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x04]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x04
+
+# CHECK: v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x05]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x05
+
+# CHECK: v_subrev_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD    ; encoding: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x0e]
+0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x0e