[lld] r318831 - [MIPS] Write PLT0 entry in case of linking N64 ABI code
Simon Atanasyan via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 22 04:34:29 PST 2017
Author: atanasyan
Date: Wed Nov 22 04:34:29 2017
New Revision: 318831
URL: http://llvm.org/viewvc/llvm-project?rev=318831&view=rev
Log:
[MIPS] Write PLT0 entry in case of linking N64 ABI code
Added:
lld/trunk/test/ELF/mips-26-n32-n64.s
Modified:
lld/trunk/ELF/Arch/Mips.cpp
Modified: lld/trunk/ELF/Arch/Mips.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/Mips.cpp?rev=318831&r1=318830&r2=318831&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/Mips.cpp (original)
+++ lld/trunk/ELF/Arch/Mips.cpp Wed Nov 22 04:34:29 2017
@@ -278,15 +278,24 @@ template <class ELFT> void MIPS<ELFT>::w
write32<E>(Buf + 4, 0x8dd90000); // lw $25, %lo(&GOTPLT[0])($14)
write32<E>(Buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
write32<E>(Buf + 12, 0x030ec023); // subu $24, $24, $14
+ write32<E>(Buf + 16, 0x03e07825); // move $15, $31
+ write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2
+ } else if (ELFT::Is64Bits) {
+ write32<E>(Buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
+ write32<E>(Buf + 4, 0xddd90000); // ld $25, %lo(&GOTPLT[0])($14)
+ write32<E>(Buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
+ write32<E>(Buf + 12, 0x030ec023); // subu $24, $24, $14
+ write32<E>(Buf + 16, 0x03e07825); // move $15, $31
+ write32<E>(Buf + 20, 0x0018c0c2); // srl $24, $24, 3
} else {
write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0])
write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28
+ write32<E>(Buf + 16, 0x03e07825); // move $15, $31
+ write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2
}
- write32<E>(Buf + 16, 0x03e07825); // move $15, $31
- write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2
write32<E>(Buf + 24, 0x0320f809); // jalr $25
write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2
Added: lld/trunk/test/ELF/mips-26-n32-n64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/mips-26-n32-n64.s?rev=318831&view=auto
==============================================================================
--- lld/trunk/test/ELF/mips-26-n32-n64.s (added)
+++ lld/trunk/test/ELF/mips-26-n32-n64.s Wed Nov 22 04:34:29 2017
@@ -0,0 +1,35 @@
+# Check R_MIPS_26 relocation handling in case of N64 ABIs.
+
+# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux \
+# RUN: %S/Inputs/mips-dynamic.s -o %t-so.o
+# RUN: ld.lld %t-so.o -shared -o %t.so
+# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux %s -o %t.o
+# RUN: ld.lld %t.o %t.so -o %t.exe
+# RUN: llvm-objdump -d %t.exe | FileCheck %s
+
+# REQUIRES: mips
+
+# CHECK: Disassembly of section .text:
+# CHECK-NEXT: __start:
+# CHECK-NEXT: 20000: 0c 00 80 0c jal 131120
+# CHECK-NEXT: 20004: 00 00 00 00 nop
+# CHECK-NEXT: Disassembly of section .plt:
+# CHECK-NEXT: .plt:
+# CHECK-NEXT: 20010: 3c 0e 00 03 lui $14, 3
+# CHECK-NEXT: 20014: dd d9 00 08 ld $25, 8($14)
+# CHECK-NEXT: 20018: 25 ce 00 08 addiu $14, $14, 8
+# CHECK-NEXT: 2001c: 03 0e c0 23 subu $24, $24, $14
+# CHECK-NEXT: 20020: 03 e0 78 25 move $15, $ra
+# CHECK-NEXT: 20024: 00 18 c0 c2 srl $24, $24, 3
+# CHECK-NEXT: 20028: 03 20 f8 09 jalr $25
+# CHECK-NEXT: 2002c: 27 18 ff fe addiu $24, $24, -2
+# CHECK-NEXT: 20030: 3c 0f 00 03 lui $15, 3
+# CHECK-NEXT: 20034: 8d f9 00 18 lw $25, 24($15)
+# CHECK-NEXT: 20038: 03 20 00 08 jr $25
+# CHECK-NEXT: 2003c: 25 f8 00 18 addiu $24, $15, 24
+
+ .text
+ .option pic0
+ .global __start
+__start:
+ jal foo0
More information about the llvm-commits
mailing list