[PATCH] D39415: [ARMISelLowering] Better handling of NEON load/store for sequential memory regions

[Eugene Leviant via Phabricator via llvm-commits]

evgeny777 added a comment.

@eastig I've tested patch on bzip2. I don't have SpecCPU 2006, so I used plain 1.0.3
Here are sizes of code section I got for different runs.

1. Cortex-a57 and SDNode scheduler (-Wall -Winline  -target arm-none-linux-gnueabihf -mfloat-abi=hard -O3 -mcpu=cortex-a57 -fomit-frame-pointer)

  Before: 84188
  After: 83172

2. Cortex-a57 and MI scheduler (-Wall -Winline  -target arm-none-linux-gnueabihf -mfloat-abi=hard -O3 -mcpu=cortex-a57 -Xclang -target-feature -Xclang +use-misched -fomit-frame-pointer)

  Before: 80088
  After: 79440

3. Cortex-a15  (-Wall -Winline  -target arm-none-linux-gnueabihf -mfloat-abi=hard -O3 -mcpu=cortex-a15 -fomit-frame-pointer)

  Before: 81672
  After: 81320


https://reviews.llvm.org/D39415