[PATCH] D40306: [AArch64] Add patterns to replace fsub fmul with fma fneg.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

This patch adds MachineCombiner patterns for transforming
(fsub (fmul x y) z) into (fma x y (fneg z)). This has a lower
latency on micro architectures where fneg is cheap.

Patch based on work by George Steed.


https://reviews.llvm.org/D40306

Files:
  include/llvm/CodeGen/MachineCombinerPattern.h
  lib/Target/AArch64/AArch64InstrInfo.cpp
  test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir

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