[PATCH] D40183: [AMDGPU] Waitcnt pass. Add S_WAITCNT 0 if incomplete predecessor info

[Mark Searles via Phabricator via llvm-commits]

msearles marked 4 inline comments as done.
msearles added inline comments.


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Comment at: test/CodeGen/AMDGPU/waitcnt-no-preds.ll:2
+; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck %s
+
+; check that the waitcnt pass inserts a S_WAITCNT 0 at the top of a
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arsenm wrote:
> A smaller mir test is probably possible
I was not successful in my attempts to create a mir test; with llvm.amdgcn.buffer.load.f32(), mir-generation fails; without llvm.amdgcn.buffer.load.f32(), the generated code is perturbed and the bug is no longer hit. I did, however, reduce the *ll a fair bit.


https://reviews.llvm.org/D40183