[PATCH] D40003: [RISCV] MC layer support for the rest instructions of standard compress instruction set

Shiva Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 20 17:36:56 PST 2017


shiva0217 added inline comments.


================
Comment at: lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:281
 
+  bool isSImm10Lsb0000() const {
+    int64_t Imm;
----------------
apazos wrote:
> shouldn't this one go after isSImm13Lsb0()? 
Move isSImm10Lsb0000 after isSImm13Lsb0


Repository:
  rL LLVM

https://reviews.llvm.org/D40003





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