[PATCH] D40191: [X86] Output cfi directives for saved XMM registers even if no GPRs are saved
Martin Storsjö via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 17 12:46:23 PST 2017
mstorsjo created this revision.
Herald added a subscriber: aprantl.
This makes sure that functions that only clobber xmm registers (on win64) also get the right cfi directives, if dwarf exceptions are enabled. (https://reviews.llvm.org/D39673 will allow users to enable dwarf on x86_64 on clang.)
https://reviews.llvm.org/D40191
Files:
lib/Target/X86/X86FrameLowering.cpp
test/CodeGen/X86/cfi-xmm.ll
Index: test/CodeGen/X86/cfi-xmm.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/cfi-xmm.ll
@@ -0,0 +1,21 @@
+; RUN: llc -mtriple x86_64-w64-windows-gnu -filetype=asm -exception-model=dwarf -o - %s | FileCheck %s
+
+define void @_Z1fv() {
+entry:
+ tail call void asm sideeffect "", "~{xmm10},~{xmm15},~{dirflag},~{fpsr},~{flags}"()
+ ret void
+}
+
+; CHECK-LABEL: _Z1fv:
+; CHECK: .cfi_startproc
+; CHECK: subq $40, %rsp
+; CHECK: movaps %xmm15, 16(%rsp)
+; CHECK: movaps %xmm10, (%rsp)
+; CHECK: .cfi_def_cfa_offset 48
+; CHECK: .cfi_offset %xmm10, -48
+; CHECK: .cfi_offset %xmm15, -32
+; CHECK: movaps (%rsp), %xmm10
+; CHECK: movaps 16(%rsp), %xmm15
+; CHECK: addq $40, %rsp
+; CHECK: retq
+; CHECK: .cfi_endproc
Index: lib/Target/X86/X86FrameLowering.cpp
===================================================================
--- lib/Target/X86/X86FrameLowering.cpp
+++ lib/Target/X86/X86FrameLowering.cpp
@@ -1436,8 +1436,7 @@
}
// Emit DWARF info specifying the offsets of the callee-saved registers.
- if (PushedRegs)
- emitCalleeSavedFrameMoves(MBB, MBBI, DL);
+ emitCalleeSavedFrameMoves(MBB, MBBI, DL);
}
// X86 Interrupt handling function cannot assume anything about the direction
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