[llvm] r318472 - [ARM] 't' asm constraint should accept i32

[Yi Kong via llvm-commits]

Author: kongyi
Date: Thu Nov 16 15:38:17 2017
New Revision: 318472

URL: http://llvm.org/viewvc/llvm-project?rev=318472&view=rev
Log:
[ARM] 't' asm constraint should accept i32

't' constraint normally only accepts f32 operands, but for VCVT the
operands can be i32. LLVM is overly restrictive and rejects asm like:

  float foo() {
    float result;
    __asm__ __volatile__(
      "vcvt.f32.s32 %[result], %[arg1]\n"
      : [result]"=t"(result)
      : [arg1]"t"(0x01020304) );
    return result;
  }

Relax the value type for 't' constraint to either f32 or i32.

Differential Revision: https://reviews.llvm.org/D40137


Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/test/CodeGen/ARM/inlineasm.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=318472&r1=318471&r2=318472&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 16 15:38:17 2017
@@ -13024,7 +13024,7 @@ RCPair ARMTargetLowering::getRegForInlin
         return RCPair(0U, &ARM::QPR_8RegClass);
       break;
     case 't':
-      if (VT == MVT::f32)
+      if (VT == MVT::f32 || VT == MVT::i32)
         return RCPair(0U, &ARM::SPRRegClass);
       break;
     }

Modified: llvm/trunk/test/CodeGen/ARM/inlineasm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm.ll?rev=318472&r1=318471&r2=318472&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm.ll Thu Nov 16 15:38:17 2017
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o /dev/null
+; RUN: llc -mtriple=armv8-eabi -mattr=+neon %s -o - | FileCheck %s
 
 define i32 @test1(i32 %tmp54) {
 	%tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 )		; <i32> [#uses=1]
@@ -9,3 +9,10 @@ define void @test2() {
 	tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
 	ret void
 }
+
+define float @t-constraint-int(i32 %i) {
+	; CHECK-LABEL: t-constraint-int
+	; CHECK: vcvt.f32.s32 {{s[0-9]+}}, {{s[0-9]+}}
+	%ret = call float asm "vcvt.f32.s32 $0, $1\0A", "=t,t"(i32 %i)
+	ret float %ret
+}