[llvm] r318454 - [RISCV] Fix 64-bit data layout mismatch between backend and target description

[Mandeep Singh Grang via llvm-commits]

Author: mgrang
Date: Thu Nov 16 12:30:49 2017
New Revision: 318454

URL: http://llvm.org/viewvc/llvm-project?rev=318454&view=rev
Log:
[RISCV] Fix 64-bit data layout mismatch between backend and target description

Reviewers: asb

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, llvm-commits

Differential Revision: https://reviews.llvm.org/D40145

Modified:
    llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp

Modified: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp?rev=318454&r1=318453&r2=318454&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp Thu Nov 16 12:30:49 2017
@@ -30,7 +30,7 @@ extern "C" void LLVMInitializeRISCVTarge
 
 static std::string computeDataLayout(const Triple &TT) {
   if (TT.isArch64Bit()) {
-    return "e-m:e-i64:64-n32:64-S128";
+    return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
   } else {
     assert(TT.isArch32Bit() && "only RV32 and RV64 are currently supported");
     return "e-m:e-p:32:32-i64:64-n32-S128";