[PATCH] D40136: [ARM] Fix missed vpadd combine opportunity.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 16 11:15:56 PST 2017
efriedma added a reviewer: efriedma.
efriedma added inline comments.
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Comment at: lib/Target/ARM/ARMISelLowering.cpp:9423
+static SDValue AddCombineVUZPToVPADD(SDNode *N, SDValue N0, SDValue N1,
+ TargetLowering::DAGCombinerInfo &DCI,
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Please rename this, or refactor the code, so the difference between AddCombineToVPADD and and this function is clear.
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:9432
+ if (!(N0.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
+ N1.getOpcode() == ISD::EXTRACT_SUBVECTOR))
+ return SDValue();
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Do you need to check the index of the EXTRACT_SUBVECTORs?
================
Comment at: test/CodeGen/ARM/vpadd.ll:406
+ ret void
+}
+
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I'd like to see more tests, to make sure we have some test coverage for cases where the combine isn't legal.
https://reviews.llvm.org/D40136
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