[PATCH] D40074: [GISel] Canonicalize constants to RHS for commutative operations

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added a comment.

Hi Diana,

> It is particularly important for TableGen, since it only generates code to match (op reg,
>  imm), and there's no point in making it do any extra work to check for
>  the other variant too.

That's odd. TableGen appears to handle some commutativity but maybe the cases I've seen are special somehow. For example AArch64 emits these:

  // (add:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
  // (add:{ *:[i32] } addsub_shifted_imm32:{ *:[i32] }:$imm, GPR32sp:{ *:[i32] }:$Rn)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)

I believe both of these originate from the pattern in BaseAddSubImm. I also vaguely remember seeing some code that checked whether commutativity made a difference before adding a second TreePattern to handle the commutative case.

I'll see if I can spot why ARM's case is different.


https://reviews.llvm.org/D40074