[PATCH] D40061: [WIP] [ARM] Make MachineVerifier more strict about terminators

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

IfConversion itself doesn't produce blocks with branches in the middle.  It produces something like "bxne lr; b .LBB5_5" (a conditional return followed by an unconditional branch).  From the verifier's perspective, that's fine because they're both terminators.  But analyzeBranch was ignoring the conditional return, so MachineBlockPlacement would merge the block with the following block.

I would guess this didn't break anything because IfConversion runs pretty late in the pipeline.


Repository:
  rL LLVM

https://reviews.llvm.org/D40061