[PATCH] D39952: [X86]: Adding full coverage of MC encoding for all X86 ISA Sets.NFC

[Gadi Haber via Phabricator via llvm-commits]

gadi.haber added a comment.

Ok. The CLZERO instruction is going to be part of AMD ISA Set. It is very recent and part of of the Rizen CPU.


Repository:
  rL LLVM

https://reviews.llvm.org/D39952