[llvm] r318148 - ARM: correctly update CFG when splitting BB to fix branch.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Tue Nov 14 03:43:54 2017
New Revision: 318148

URL: http://llvm.org/viewvc/llvm-project?rev=318148&view=rev
Log:
ARM: correctly update CFG when splitting BB to fix branch.

Because the block-splitting code is multi-purpose, we have to meddle with the
branches when using it to fixup a conditional branch destination. We got the
code right, but forgot to update the CFG so the verifier complained when
expensive checks were on.

Probably harmless since constant-islands comes so late, but best to fix it
anyway.

Added:
    llvm/trunk/test/CodeGen/ARM/constant-islands-cfg.mir
Modified:
    llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=318148&r1=318147&r2=318148&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Tue Nov 14 03:43:54 2017
@@ -1689,6 +1689,12 @@ ARMConstantIslands::fixupConditionalBr(I
     int delta = TII->getInstSizeInBytes(MBB->back());
     BBInfo[MBB->getNumber()].Size -= delta;
     MBB->back().eraseFromParent();
+
+    // The conditional successor will be swapped between the BBs after this, so
+    // update CFG.
+    MBB->addSuccessor(DestBB);
+    std::next(MBB->getIterator())->removeSuccessor(DestBB);
+
     // BBInfo[SplitBB].Offset is wrong temporarily, fixed below
   }
   MachineBasicBlock *NextBB = &*++MBB->getIterator();

Added: llvm/trunk/test/CodeGen/ARM/constant-islands-cfg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constant-islands-cfg.mir?rev=318148&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/constant-islands-cfg.mir (added)
+++ llvm/trunk/test/CodeGen/ARM/constant-islands-cfg.mir Tue Nov 14 03:43:54 2017
@@ -0,0 +1,64 @@
+# RUN: llc -mtriple=thumbv6m-apple-ios -run-pass=arm-cp-islands %s -o - | FileCheck %s
+--- |
+  ; Function Attrs: minsize nounwind optsize uwtable
+  define arm_aapcscc double @test_split_cfg(double %a, double %b) local_unnamed_addr #0 {
+    ret double undef
+  }
+...
+---
+name:            test_split_cfg
+alignment:       1
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+liveins:
+  - { reg: '%r0', virtual-reg: '' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       48
+  offsetAdjustment: 0
+  maxAlignment:    4
+  adjustsStack:    true
+  hasCalls:        true
+  stackProtector:  ''
+  maxCallFrameSize: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:
+# CHECK-LABEL: name: test_split_cfg
+# CHECK: bb.0:
+# CHECK:     successors: %[[LONG_BR_BB:bb.[0-9]+]](0x{{[0-9a-f]+}}), %[[DEST1:bb.[0-9]+]](0x{{[0-9a-f]+}}){{$}}
+# CHECK:     tBcc %[[LONG_BR_BB]], 0, %cpsr
+# CHECK:     tB %[[DEST1]]
+# CHECK: [[LONG_BR_BB]]:
+# CHECK:     successors: %[[DEST2:bb.[0-9]+]](0x{{[0-9a-f]+}}){{$}}
+# CHECK:     tB %[[DEST2]]
+# CHECK: [[DEST1]]:
+# CHECK: [[DEST2]]:
+
+body:             |
+  bb.0:
+    liveins: %r0
+    tCMPi8 killed %r0, 0, 14, _, implicit-def %cpsr
+    tBcc %bb.2, 1, killed %cpsr
+    tB %bb.3, 14, _
+
+  bb.1:
+    dead %r0 = SPACE 256, undef %r0
+
+  bb.2:
+    tPOP_RET 14, _, def %pc
+
+  bb.3:
+    tPOP_RET 14, _, def %pc
+
+...