[llvm] r318095 - [tablegen] Handle atomic predicates for memory type inside tablegen. NFC.
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 13 14:26:13 PST 2017
Author: dsanders
Date: Mon Nov 13 14:26:13 2017
New Revision: 318095
URL: http://llvm.org/viewvc/llvm-project?rev=318095&view=rev
Log:
[tablegen] Handle atomic predicates for memory type inside tablegen. NFC.
Similar to r315841, GlobalISel and SelectionDAG require different code for the
common atomic predicates due to differences in the representation.
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.
This patch moves the implementation of the common atomic predicates related to
memory type into tablegen so that it can handle these differences.
It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.
Modified:
llvm/trunk/include/llvm/Target/TargetSelectionDAG.td
llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h
Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=318095&r1=318094&r2=318095&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original)
+++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Mon Nov 13 14:26:13 2017
@@ -659,6 +659,8 @@ class PatFrag<dag ops, dag frag, code pr
bit IsLoad = ?;
// Is the desired pre-packaged predicate for a store?
bit IsStore = ?;
+ // Is the desired pre-packaged predicate for an atomic?
+ bit IsAtomic = ?;
// cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
// cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
@@ -1181,21 +1183,25 @@ multiclass ternary_atomic_op_ord<SDNode
multiclass binary_atomic_op<SDNode atomic_op> {
def _8 : PatFrag<(ops node:$ptr, node:$val),
- (atomic_op node:$ptr, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
- }]>;
+ (atomic_op node:$ptr, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i8;
+ }
def _16 : PatFrag<(ops node:$ptr, node:$val),
- (atomic_op node:$ptr, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
- }]>;
+ (atomic_op node:$ptr, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i16;
+ }
def _32 : PatFrag<(ops node:$ptr, node:$val),
- (atomic_op node:$ptr, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
- }]>;
+ (atomic_op node:$ptr, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i32;
+ }
def _64 : PatFrag<(ops node:$ptr, node:$val),
- (atomic_op node:$ptr, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
- }]>;
+ (atomic_op node:$ptr, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i64;
+ }
defm NAME#_8 : binary_atomic_op_ord<atomic_op>;
defm NAME#_16 : binary_atomic_op_ord<atomic_op>;
@@ -1205,21 +1211,25 @@ multiclass binary_atomic_op<SDNode atomi
multiclass ternary_atomic_op<SDNode atomic_op> {
def _8 : PatFrag<(ops node:$ptr, node:$cmp, node:$val),
- (atomic_op node:$ptr, node:$cmp, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
- }]>;
+ (atomic_op node:$ptr, node:$cmp, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i8;
+ }
def _16 : PatFrag<(ops node:$ptr, node:$cmp, node:$val),
- (atomic_op node:$ptr, node:$cmp, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
- }]>;
+ (atomic_op node:$ptr, node:$cmp, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i16;
+ }
def _32 : PatFrag<(ops node:$ptr, node:$cmp, node:$val),
- (atomic_op node:$ptr, node:$cmp, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
- }]>;
+ (atomic_op node:$ptr, node:$cmp, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i32;
+ }
def _64 : PatFrag<(ops node:$ptr, node:$cmp, node:$val),
- (atomic_op node:$ptr, node:$cmp, node:$val), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
- }]>;
+ (atomic_op node:$ptr, node:$cmp, node:$val)> {
+ let IsAtomic = 1;
+ let MemoryVT = i64;
+ }
defm NAME#_8 : ternary_atomic_op_ord<atomic_op>;
defm NAME#_16 : ternary_atomic_op_ord<atomic_op>;
@@ -1243,24 +1253,28 @@ defm atomic_cmp_swap : ternary_atomic_o
def atomic_load_8 :
PatFrag<(ops node:$ptr),
- (atomic_load node:$ptr), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
-}]>;
+ (atomic_load node:$ptr)> {
+ let IsAtomic = 1;
+ let MemoryVT = i8;
+}
def atomic_load_16 :
PatFrag<(ops node:$ptr),
- (atomic_load node:$ptr), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
-}]>;
+ (atomic_load node:$ptr)> {
+ let IsAtomic = 1;
+ let MemoryVT = i16;
+}
def atomic_load_32 :
PatFrag<(ops node:$ptr),
- (atomic_load node:$ptr), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
-}]>;
+ (atomic_load node:$ptr)> {
+ let IsAtomic = 1;
+ let MemoryVT = i32;
+}
def atomic_load_64 :
PatFrag<(ops node:$ptr),
- (atomic_load node:$ptr), [{
- return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
-}]>;
+ (atomic_load node:$ptr)> {
+ let IsAtomic = 1;
+ let MemoryVT = i64;
+}
//===----------------------------------------------------------------------===//
// Selection DAG Pattern Support.
Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=318095&r1=318094&r2=318095&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Mon Nov 13 14:26:13 2017
@@ -818,32 +818,36 @@ TreePredicateFn::TreePredicateFn(TreePat
}
bool TreePredicateFn::hasPredCode() const {
- return isLoad() || isStore() ||
+ return isLoad() || isStore() || isAtomic() ||
!PatFragRec->getRecord()->getValueAsString("PredicateCode").empty();
}
std::string TreePredicateFn::getPredCode() const {
std::string Code = "";
+ if (!isLoad() && !isStore() && !isAtomic()) {
+ Record *MemoryVT = getMemoryVT();
+
+ if (MemoryVT)
+ PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
+ "MemoryVT requires IsLoad or IsStore");
+ }
+
if (!isLoad() && !isStore()) {
if (isUnindexed())
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
"IsUnindexed requires IsLoad or IsStore");
- Record *MemoryVT = getMemoryVT();
Record *ScalarMemoryVT = getScalarMemoryVT();
- if (MemoryVT)
- PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
- "MemoryVT requires IsLoad or IsStore");
if (ScalarMemoryVT)
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
"ScalarMemoryVT requires IsLoad or IsStore");
}
- if (isLoad() && isStore())
+ if (isLoad() + isStore() + isAtomic() > 1)
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
- "IsLoad and IsStore are mutually exclusive");
+ "IsLoad, IsStore, and IsAtomic are mutually exclusive");
if (isLoad()) {
if (!isUnindexed() && !isNonExtLoad() && !isAnyExtLoad() &&
@@ -880,6 +884,23 @@ std::string TreePredicateFn::getPredCode
"IsTruncStore requires IsStore");
}
+ if (isAtomic()) {
+ if (getMemoryVT() == nullptr)
+ PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
+ "IsAtomic cannot be used by itself");
+ }
+ if (isLoad() || isStore() || isAtomic()) {
+ StringRef SDNodeName =
+ isLoad() ? "LoadSDNode" : isStore() ? "StoreSDNode" : "AtomicSDNode";
+
+ Record *MemoryVT = getMemoryVT();
+
+ if (MemoryVT)
+ Code += ("if (cast<" + SDNodeName + ">(N)->getMemoryVT() != MVT::" +
+ MemoryVT->getName() + ") return false;\n")
+ .str();
+ }
+
if (isLoad() || isStore()) {
StringRef SDNodeName = isLoad() ? "LoadSDNode" : "StoreSDNode";
@@ -920,13 +941,8 @@ std::string TreePredicateFn::getPredCode
" if (!cast<StoreSDNode>(N)->isTruncatingStore()) return false;\n";
}
- Record *MemoryVT = getMemoryVT();
Record *ScalarMemoryVT = getScalarMemoryVT();
- if (MemoryVT)
- Code += ("if (cast<" + SDNodeName + ">(N)->getMemoryVT() != MVT::" +
- MemoryVT->getName() + ") return false;\n")
- .str();
if (ScalarMemoryVT)
Code += ("if (cast<" + SDNodeName +
">(N)->getMemoryVT().getScalarType() != MVT::" +
@@ -978,6 +994,9 @@ bool TreePredicateFn::isLoad() const {
bool TreePredicateFn::isStore() const {
return isPredefinedPredicateEqualTo("IsStore", true);
}
+bool TreePredicateFn::isAtomic() const {
+ return isPredefinedPredicateEqualTo("IsAtomic", true);
+}
bool TreePredicateFn::isUnindexed() const {
return isPredefinedPredicateEqualTo("IsUnindexed", true);
}
Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h?rev=318095&r1=318094&r2=318095&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Mon Nov 13 14:26:13 2017
@@ -486,6 +486,8 @@ public:
bool isLoad() const;
// Is the desired predefined predicate for a store?
bool isStore() const;
+ // Is the desired predefined predicate for an atomic?
+ bool isAtomic() const;
/// Is this predicate the predefined unindexed load predicate?
/// Is this predicate the predefined unindexed store predicate?
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