[PATCH] D39820: [cfi-verify] Validate there are no spills between CFI-check and instruction execution.

Vlad Tsyrklevich via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 10 14:29:35 PST 2017


vlad.tsyrklevich added inline comments.


================
Comment at: unittests/tools/llvm-cfi-verify/FileAnalysis.cpp:751
+          0x0f, 0x0b,                         // 2: ud2
+          0x48, 0x05, 0x00, 0x00, 0x00, 0x00, // 4: add $0x0, %eax
+          0xff, 0x10,                         // 10: callq *(%rax)
----------------
vlad.tsyrklevich wrote:
> Take a look at [1]. This uses 0x05 which is an encoding specifically for add %eax, if you use an instruction that explicit encodes %rax in the ModR/M encoding like 48 83 c0 00 this test will fail. This is a bit silly since from the assembly writers perspective %rax is explicit here but it's not at the MC layer.
> 
> [1] http://x86.renejeschke.de/html/file_module_x86_id_5.html
> 
> *Also this still says %eax
Oh, I forgot to mention you can witness this with llvm-mc:
```
$ echo "0x48 0x83 0xc0 0x00" | llvm-mc --disassemble -show-inst -show-inst-operands
	.text
	addq	$0, %rax                # <MCInst #187 ADD64ri8
                                        #  <MCOperand Reg:35>
                                        #  <MCOperand Reg:35>
                                        #  <MCOperand Imm:0>>
$ echo "0x48 0x05 0x00 0x00 0x00 0x00" | llvm-mc --disassemble -show-inst -show-inst-operands
	.text
	addq	$0, %rax                # <MCInst #181 ADD64i32
                                        #  <MCOperand Imm:0>>

```


https://reviews.llvm.org/D39820





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