[llvm] r317920 - AMDGPU/NFC: Split Processors.td into GCNProcessors.td and R600Processors.td
Konstantin Zhuravlyov via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 10 12:01:59 PST 2017
Author: kzhuravl
Date: Fri Nov 10 12:01:58 2017
New Revision: 317920
URL: http://llvm.org/viewvc/llvm-project?rev=317920&view=rev
Log:
AMDGPU/NFC: Split Processors.td into GCNProcessors.td and R600Processors.td
Differential Revision: https://reviews.llvm.org/D39880
Added:
llvm/trunk/lib/Target/AMDGPU/GCNProcessors.td
llvm/trunk/lib/Target/AMDGPU/R600Processors.td
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
llvm/trunk/lib/Target/AMDGPU/Processors.td
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPU.td?rev=317920&r1=317919&r2=317920&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPU.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPU.td Fri Nov 10 12:01:58 2017
@@ -769,8 +769,9 @@ class AMDGPUPat<dag pattern, dag result>
// Include AMDGPU TD files
include "R600Schedule.td"
+include "R600Processors.td"
include "SISchedule.td"
-include "Processors.td"
+include "GCNProcessors.td"
include "AMDGPUInstrInfo.td"
include "AMDGPUIntrinsics.td"
include "AMDGPURegisterInfo.td"
Added: llvm/trunk/lib/Target/AMDGPU/GCNProcessors.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/GCNProcessors.td?rev=317920&view=auto
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNProcessors.td (added)
+++ llvm/trunk/lib/Target/AMDGPU/GCNProcessors.td Fri Nov 10 12:01:58 2017
@@ -0,0 +1,162 @@
+//===-- GCNProcessors.td - GCN Processor definitions ----------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+// The code produced for "generic" is only useful for tests and cannot
+// reasonably be expected to execute on any particular target.
+def : ProcessorModel<"generic", NoSchedModel,
+ [FeatureGCN, FeatureWavefrontSize64]
+>;
+
+//===----------------------------------------------------------------------===//
+// GCN GFX6 (Southern Islands (SI)).
+//===----------------------------------------------------------------------===//
+
+def : ProcessorModel<"gfx600", SIFullSpeedModel,
+ [FeatureISAVersion6_0_0]
+>;
+
+def : ProcessorModel<"tahiti", SIFullSpeedModel,
+ [FeatureISAVersion6_0_0]
+>;
+
+def : ProcessorModel<"gfx601", SIQuarterSpeedModel,
+ [FeatureISAVersion6_0_1]
+>;
+
+def : ProcessorModel<"hainan", SIQuarterSpeedModel,
+ [FeatureISAVersion6_0_1]
+>;
+
+def : ProcessorModel<"oland", SIQuarterSpeedModel,
+ [FeatureISAVersion6_0_1]
+>;
+
+def : ProcessorModel<"pitcairn", SIQuarterSpeedModel,
+ [FeatureISAVersion6_0_1]
+>;
+
+def : ProcessorModel<"verde", SIQuarterSpeedModel,
+ [FeatureISAVersion6_0_1]
+>;
+
+//===----------------------------------------------------------------------===//
+// GCN GFX7 (Sea Islands (CI)).
+//===----------------------------------------------------------------------===//
+
+def : ProcessorModel<"gfx700", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_0]
+>;
+
+def : ProcessorModel<"bonaire", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_0]
+>;
+
+def : ProcessorModel<"kaveri", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_0]
+>;
+
+def : ProcessorModel<"gfx701", SIFullSpeedModel,
+ [FeatureISAVersion7_0_1]
+>;
+
+def : ProcessorModel<"hawaii", SIFullSpeedModel,
+ [FeatureISAVersion7_0_1]
+>;
+
+def : ProcessorModel<"gfx702", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_2]
+>;
+
+def : ProcessorModel<"gfx703", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_3]
+>;
+
+def : ProcessorModel<"kabini", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_3]
+>;
+
+def : ProcessorModel<"mullins", SIQuarterSpeedModel,
+ [FeatureISAVersion7_0_3]
+>;
+
+//===----------------------------------------------------------------------===//
+// GCN GFX8 (Volcanic Islands (VI)).
+//===----------------------------------------------------------------------===//
+
+def : ProcessorModel<"gfx800", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_0]
+>;
+
+def : ProcessorModel<"iceland", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_0]
+>;
+
+def : ProcessorModel<"gfx801", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_1]
+>;
+
+def : ProcessorModel<"carrizo", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_1]
+>;
+
+def : ProcessorModel<"gfx802", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_2]
+>;
+
+def : ProcessorModel<"tonga", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_2]
+>;
+
+def : ProcessorModel<"gfx803", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_3]
+>;
+
+def : ProcessorModel<"fiji", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_3]
+>;
+
+def : ProcessorModel<"polaris10", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_3]
+>;
+
+def : ProcessorModel<"polaris11", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_3]
+>;
+
+def : ProcessorModel<"gfx804", SIQuarterSpeedModel,
+ [FeatureISAVersion8_0_4]
+>;
+
+def : ProcessorModel<"gfx810", SIQuarterSpeedModel,
+ [FeatureISAVersion8_1_0]
+>;
+
+def : ProcessorModel<"stoney", SIQuarterSpeedModel,
+ [FeatureISAVersion8_1_0]
+>;
+
+//===----------------------------------------------------------------------===//
+// GCN GFX9.
+//===----------------------------------------------------------------------===//
+
+def : ProcessorModel<"gfx900", SIQuarterSpeedModel,
+ [FeatureISAVersion9_0_0]
+>;
+
+def : ProcessorModel<"gfx901", SIQuarterSpeedModel,
+ [FeatureISAVersion9_0_1]
+>;
+
+def : ProcessorModel<"gfx902", SIQuarterSpeedModel,
+ [FeatureISAVersion9_0_2]
+>;
+
+def : ProcessorModel<"gfx903", SIQuarterSpeedModel,
+ [FeatureISAVersion9_0_3]
+>;
Modified: llvm/trunk/lib/Target/AMDGPU/Processors.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/Processors.td?rev=317920&r1=317919&r2=317920&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/Processors.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/Processors.td Fri Nov 10 12:01:58 2017
@@ -1,4 +1,4 @@
-//===-- Processors.td - R600 Processor definitions ------------------------===//
+//===-- Processors.td - AMDGPU Processor definitions ----------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,219 +7,6 @@
//
//===----------------------------------------------------------------------===//
-class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>
-: Processor<Name, itin, Features>;
-
-// The code produced for "generic" is only useful for tests and cannot
-// reasonably be expected to execute on any particular target.
-def : ProcessorModel<"generic", NoSchedModel, [
- FeatureGCN, FeatureWavefrontSize64
-]>;
-
-//===----------------------------------------------------------------------===//
-// R600
-//===----------------------------------------------------------------------===//
-def : Proc<"r600", R600_VLIW5_Itin,
- [FeatureR600, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-def : Proc<"r630", R600_VLIW5_Itin,
- [FeatureR600, FeatureVertexCache, FeatureWavefrontSize32]>;
-
-def : Proc<"rs880", R600_VLIW5_Itin,
- [FeatureR600, FeatureWavefrontSize16]>;
-
-def : Proc<"rv670", R600_VLIW5_Itin,
- [FeatureR600, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-//===----------------------------------------------------------------------===//
-// R700
-//===----------------------------------------------------------------------===//
-
-def : Proc<"rv710", R600_VLIW5_Itin,
- [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
-
-def : Proc<"rv730", R600_VLIW5_Itin,
- [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
-
-def : Proc<"rv770", R600_VLIW5_Itin,
- [FeatureR700, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-//===----------------------------------------------------------------------===//
-// Evergreen
-//===----------------------------------------------------------------------===//
-
-def : Proc<"cedar", R600_VLIW5_Itin,
- [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32,
- FeatureCFALUBug]>;
-
-def : Proc<"redwood", R600_VLIW5_Itin,
- [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64,
- FeatureCFALUBug]>;
-
-def : Proc<"sumo", R600_VLIW5_Itin,
- [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>;
-
-def : Proc<"juniper", R600_VLIW5_Itin,
- [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-def : Proc<"cypress", R600_VLIW5_Itin,
- [FeatureEvergreen, FeatureFP64, FeatureVertexCache,
- FeatureWavefrontSize64]>;
-
-//===----------------------------------------------------------------------===//
-// Northern Islands
-//===----------------------------------------------------------------------===//
-
-def : Proc<"barts", R600_VLIW5_Itin,
- [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
-
-def : Proc<"turks", R600_VLIW5_Itin,
- [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
-
-def : Proc<"caicos", R600_VLIW5_Itin,
- [FeatureNorthernIslands, FeatureCFALUBug]>;
-
-def : Proc<"cayman", R600_VLIW4_Itin,
- [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;
-
-//===----------------------------------------------------------------------===//
-// Southern Islands
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"gfx600", SIFullSpeedModel,
- [FeatureISAVersion6_0_0]>;
-
-def : ProcessorModel<"tahiti", SIFullSpeedModel,
- [FeatureISAVersion6_0_0]
->;
-
-def : ProcessorModel<"gfx601", SIQuarterSpeedModel,
- [FeatureISAVersion6_0_1]
->;
-
-def : ProcessorModel<"pitcairn", SIQuarterSpeedModel,
- [FeatureISAVersion6_0_1]>;
-
-def : ProcessorModel<"verde", SIQuarterSpeedModel,
- [FeatureISAVersion6_0_1]>;
-
-def : ProcessorModel<"oland", SIQuarterSpeedModel,
- [FeatureISAVersion6_0_1]>;
-
-def : ProcessorModel<"hainan", SIQuarterSpeedModel, [FeatureISAVersion6_0_1]>;
-
-//===----------------------------------------------------------------------===//
-// Sea Islands
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"gfx700", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_0]
->;
-
-def : ProcessorModel<"bonaire", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_0]
->;
-
-def : ProcessorModel<"kaveri", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_0]
->;
-
-def : ProcessorModel<"gfx701", SIFullSpeedModel,
- [FeatureISAVersion7_0_1]
->;
-
-def : ProcessorModel<"hawaii", SIFullSpeedModel,
- [FeatureISAVersion7_0_1]
->;
-
-def : ProcessorModel<"gfx702", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_2]
->;
-
-def : ProcessorModel<"gfx703", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_3]
->;
-
-def : ProcessorModel<"kabini", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_3]
->;
-
-def : ProcessorModel<"mullins", SIQuarterSpeedModel,
- [FeatureISAVersion7_0_3]>;
-
-//===----------------------------------------------------------------------===//
-// Volcanic Islands
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"tonga", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_2]
->;
-
-def : ProcessorModel<"iceland", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_0]
->;
-
-def : ProcessorModel<"carrizo", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_1]
->;
-
-def : ProcessorModel<"fiji", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"stoney", SIQuarterSpeedModel,
- [FeatureISAVersion8_1_0]
->;
-
-def : ProcessorModel<"polaris10", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"polaris11", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"gfx800", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_0]
->;
-
-def : ProcessorModel<"gfx801", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_1]
->;
-
-def : ProcessorModel<"gfx802", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_2]
->;
-
-def : ProcessorModel<"gfx803", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"gfx804", SIQuarterSpeedModel,
- [FeatureISAVersion8_0_4]
->;
-
-def : ProcessorModel<"gfx810", SIQuarterSpeedModel,
- [FeatureISAVersion8_1_0]
->;
-
-//===----------------------------------------------------------------------===//
-// GFX9
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"gfx900", SIQuarterSpeedModel,
- [FeatureISAVersion9_0_0]
->;
-
-def : ProcessorModel<"gfx901", SIQuarterSpeedModel,
- [FeatureISAVersion9_0_1]
->;
-
-def : ProcessorModel<"gfx902", SIQuarterSpeedModel,
- [FeatureISAVersion9_0_2]
->;
-
-def : ProcessorModel<"gfx903", SIQuarterSpeedModel,
- [FeatureISAVersion9_0_3]
->;
-
+FIXME: Deleting this file broke buildbots that don't do full rebuilds. This
+file is no longer used by the backend, so it can be deleted once all
+the buildbots update there dependencies.
Added: llvm/trunk/lib/Target/AMDGPU/R600Processors.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600Processors.td?rev=317920&view=auto
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/R600Processors.td (added)
+++ llvm/trunk/lib/Target/AMDGPU/R600Processors.td Fri Nov 10 12:01:58 2017
@@ -0,0 +1,90 @@
+//===-- R600Processors.td - R600 Processor definitions --------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Radeon HD 2000/3000 Series (R600).
+//===----------------------------------------------------------------------===//
+
+def : Processor<"r600", R600_VLIW5_Itin,
+ [FeatureR600, FeatureWavefrontSize64, FeatureVertexCache]
+>;
+
+def : Processor<"r630", R600_VLIW5_Itin,
+ [FeatureR600, FeatureWavefrontSize32, FeatureVertexCache]
+>;
+
+def : Processor<"rs880", R600_VLIW5_Itin,
+ [FeatureR600, FeatureWavefrontSize16]
+>;
+
+def : Processor<"rv670", R600_VLIW5_Itin,
+ [FeatureR600, FeatureWavefrontSize64, FeatureVertexCache, FeatureFP64]
+>;
+
+//===----------------------------------------------------------------------===//
+// Radeon HD 4000 Series (R700).
+//===----------------------------------------------------------------------===//
+
+def : Processor<"rv710", R600_VLIW5_Itin,
+ [FeatureR700, FeatureWavefrontSize32, FeatureVertexCache]
+>;
+
+def : Processor<"rv730", R600_VLIW5_Itin,
+ [FeatureR700, FeatureWavefrontSize32, FeatureVertexCache]
+>;
+
+def : Processor<"rv770", R600_VLIW5_Itin,
+ [FeatureR700, FeatureWavefrontSize64, FeatureVertexCache, FeatureFP64]
+>;
+
+//===----------------------------------------------------------------------===//
+// Radeon HD 5000 Series (Evergreen).
+//===----------------------------------------------------------------------===//
+
+def : Processor<"cedar", R600_VLIW5_Itin,
+ [FeatureEvergreen, FeatureWavefrontSize32, FeatureVertexCache,
+ FeatureCFALUBug]
+>;
+
+def : Processor<"cypress", R600_VLIW5_Itin,
+ [FeatureEvergreen, FeatureWavefrontSize64, FeatureVertexCache, FeatureFP64]
+>;
+
+def : Processor<"juniper", R600_VLIW5_Itin,
+ [FeatureEvergreen, FeatureWavefrontSize64, FeatureVertexCache]
+>;
+
+def : Processor<"redwood", R600_VLIW5_Itin,
+ [FeatureEvergreen, FeatureWavefrontSize64, FeatureVertexCache,
+ FeatureCFALUBug]
+>;
+
+def : Processor<"sumo", R600_VLIW5_Itin,
+ [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]
+>;
+
+//===----------------------------------------------------------------------===//
+// Radeon HD 6000 Series (Northern Islands).
+//===----------------------------------------------------------------------===//
+
+def : Processor<"barts", R600_VLIW5_Itin,
+ [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]
+>;
+
+def : Processor<"caicos", R600_VLIW5_Itin,
+ [FeatureNorthernIslands, FeatureCFALUBug]
+>;
+
+def : Processor<"cayman", R600_VLIW4_Itin,
+ [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]
+>;
+
+def : Processor<"turks", R600_VLIW5_Itin,
+ [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]
+>;
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