[llvm] r317888 - [X86] Test non-i64 shld/shll tests on x86_64 targets as well as i686
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 10 05:43:04 PST 2017
Author: rksimon
Date: Fri Nov 10 05:43:04 2017
New Revision: 317888
URL: http://llvm.org/viewvc/llvm-project?rev=317888&view=rev
Log:
[X86] Test non-i64 shld/shll tests on x86_64 targets as well as i686
Modified:
llvm/trunk/test/CodeGen/X86/shift-double.ll
Modified: llvm/trunk/test/CodeGen/X86/shift-double.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-double.ll?rev=317888&r1=317887&r2=317888&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-double.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-double.ll Fri Nov 10 05:43:04 2017
@@ -1,73 +1,95 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; Shift i64 integers on 32-bit target
define i64 @test1(i64 %X, i8 %C) nounwind {
-; CHECK-LABEL: test1:
-; CHECK: # BB#0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl %esi, %eax
-; CHECK-NEXT: shll %cl, %eax
-; CHECK-NEXT: shldl %cl, %esi, %edx
-; CHECK-NEXT: testb $32, %cl
-; CHECK-NEXT: je .LBB0_2
-; CHECK-NEXT: # BB#1:
-; CHECK-NEXT: movl %eax, %edx
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: .LBB0_2:
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: retl
+; X86-LABEL: test1:
+; X86: # BB#0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: shll %cl, %eax
+; X86-NEXT: shldl %cl, %esi, %edx
+; X86-NEXT: testb $32, %cl
+; X86-NEXT: je .LBB0_2
+; X86-NEXT: # BB#1:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: .LBB0_2:
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: test1:
+; X64: # BB#0:
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: shlq %cl, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
%shift.upgrd.1 = zext i8 %C to i64 ; <i64> [#uses=1]
%Y = shl i64 %X, %shift.upgrd.1 ; <i64> [#uses=1]
ret i64 %Y
}
define i64 @test2(i64 %X, i8 %C) nounwind {
-; CHECK-LABEL: test2:
-; CHECK: # BB#0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: sarl %cl, %edx
-; CHECK-NEXT: shrdl %cl, %esi, %eax
-; CHECK-NEXT: testb $32, %cl
-; CHECK-NEXT: je .LBB1_2
-; CHECK-NEXT: # BB#1:
-; CHECK-NEXT: sarl $31, %esi
-; CHECK-NEXT: movl %edx, %eax
-; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: .LBB1_2:
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: retl
+; X86-LABEL: test2:
+; X86: # BB#0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl %esi, %edx
+; X86-NEXT: sarl %cl, %edx
+; X86-NEXT: shrdl %cl, %esi, %eax
+; X86-NEXT: testb $32, %cl
+; X86-NEXT: je .LBB1_2
+; X86-NEXT: # BB#1:
+; X86-NEXT: sarl $31, %esi
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: movl %esi, %edx
+; X86-NEXT: .LBB1_2:
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: test2:
+; X64: # BB#0:
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: sarq %cl, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
%shift.upgrd.2 = zext i8 %C to i64 ; <i64> [#uses=1]
%Y = ashr i64 %X, %shift.upgrd.2 ; <i64> [#uses=1]
ret i64 %Y
}
define i64 @test3(i64 %X, i8 %C) nounwind {
-; CHECK-LABEL: test3:
-; CHECK: # BB#0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: shrl %cl, %edx
-; CHECK-NEXT: shrdl %cl, %esi, %eax
-; CHECK-NEXT: testb $32, %cl
-; CHECK-NEXT: je .LBB2_2
-; CHECK-NEXT: # BB#1:
-; CHECK-NEXT: movl %edx, %eax
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: .LBB2_2:
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: retl
+; X86-LABEL: test3:
+; X86: # BB#0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl %esi, %edx
+; X86-NEXT: shrl %cl, %edx
+; X86-NEXT: shrdl %cl, %esi, %eax
+; X86-NEXT: testb $32, %cl
+; X86-NEXT: je .LBB2_2
+; X86-NEXT: # BB#1:
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: .LBB2_2:
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: test3:
+; X64: # BB#0:
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: shrq %cl, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
%shift.upgrd.3 = zext i8 %C to i64 ; <i64> [#uses=1]
%Y = lshr i64 %X, %shift.upgrd.3 ; <i64> [#uses=1]
ret i64 %Y
@@ -76,13 +98,20 @@ define i64 @test3(i64 %X, i8 %C) nounwin
; Combine 2xi32/2xi16 shifts into SHLD
define i32 @test4(i32 %A, i32 %B, i8 %C) nounwind {
-; CHECK-LABEL: test4:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shldl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test4:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test4:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shldl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%shift.upgrd.4 = zext i8 %C to i32 ; <i32> [#uses=1]
%X = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
%Cv = sub i8 32, %C ; <i8> [#uses=1]
@@ -93,13 +122,20 @@ define i32 @test4(i32 %A, i32 %B, i8 %C)
}
define i16 @test5(i16 %A, i16 %B, i8 %C) nounwind {
-; CHECK-LABEL: test5:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shldw %cl, %dx, %ax
-; CHECK-NEXT: retl
+; X86-LABEL: test5:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldw %cl, %dx, %ax
+; X86-NEXT: retl
+;
+; X64-LABEL: test5:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shldw %cl, %si, %di
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%shift.upgrd.6 = zext i8 %C to i16 ; <i16> [#uses=1]
%X = shl i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
%Cv = sub i8 16, %C ; <i8> [#uses=1]
@@ -112,13 +148,20 @@ define i16 @test5(i16 %A, i16 %B, i8 %C)
; Combine 2xi32/2xi16 shifts into SHRD
define i32 @test6(i32 %A, i32 %B, i8 %C) nounwind {
-; CHECK-LABEL: test6:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test6:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test6:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shrdl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%shift.upgrd.4 = zext i8 %C to i32 ; <i32> [#uses=1]
%X = lshr i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
%Cv = sub i8 32, %C ; <i8> [#uses=1]
@@ -129,13 +172,20 @@ define i32 @test6(i32 %A, i32 %B, i8 %C)
}
define i16 @test7(i16 %A, i16 %B, i8 %C) nounwind {
-; CHECK-LABEL: test7:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shrdw %cl, %dx, %ax
-; CHECK-NEXT: retl
+; X86-LABEL: test7:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrdw %cl, %dx, %ax
+; X86-NEXT: retl
+;
+; X64-LABEL: test7:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shrdw %cl, %si, %di
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%shift.upgrd.6 = zext i8 %C to i16 ; <i16> [#uses=1]
%X = lshr i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
%Cv = sub i8 16, %C ; <i8> [#uses=1]
@@ -148,17 +198,25 @@ define i16 @test7(i16 %A, i16 %B, i8 %C)
; Shift i64 integers on 32-bit target by shift value less then 32 (PR14593)
define i64 @test8(i64 %val, i32 %bits) nounwind {
-; CHECK-LABEL: test8:
-; CHECK: # BB#0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl %esi, %eax
-; CHECK-NEXT: shll %cl, %eax
-; CHECK-NEXT: shldl %cl, %esi, %edx
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: retl
+; X86-LABEL: test8:
+; X86: # BB#0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %esi, %eax
+; X86-NEXT: shll %cl, %eax
+; X86-NEXT: shldl %cl, %esi, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: test8:
+; X64: # BB#0:
+; X64-NEXT: andb $31, %sil
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: shlq %cl, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
%and = and i32 %bits, 31
%sh_prom = zext i32 %and to i64
%shl = shl i64 %val, %sh_prom
@@ -166,14 +224,22 @@ define i64 @test8(i64 %val, i32 %bits) n
}
define i64 @test9(i64 %val, i32 %bits) nounwind {
-; CHECK-LABEL: test9:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: sarl %cl, %edx
-; CHECK-NEXT: retl
+; X86-LABEL: test9:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: sarl %cl, %edx
+; X86-NEXT: retl
+;
+; X64-LABEL: test9:
+; X64: # BB#0:
+; X64-NEXT: andb $31, %sil
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: sarq %cl, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
%and = and i32 %bits, 31
%sh_prom = zext i32 %and to i64
%ashr = ashr i64 %val, %sh_prom
@@ -181,14 +247,22 @@ define i64 @test9(i64 %val, i32 %bits) n
}
define i64 @test10(i64 %val, i32 %bits) nounwind {
-; CHECK-LABEL: test10:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: shrl %cl, %edx
-; CHECK-NEXT: retl
+; X86-LABEL: test10:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: shrl %cl, %edx
+; X86-NEXT: retl
+;
+; X64-LABEL: test10:
+; X64: # BB#0:
+; X64-NEXT: andb $31, %sil
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: shrq %cl, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
%and = and i32 %bits, 31
%sh_prom = zext i32 %and to i64
%lshr = lshr i64 %val, %sh_prom
@@ -198,15 +272,23 @@ define i64 @test10(i64 %val, i32 %bits)
; SHLD/SHRD manual shifts
define i32 @test11(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test11:
-; CHECK: # BB#0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: andl $31, %ecx
-; CHECK-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT: shldl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test11:
+; X86: # BB#0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X86-NEXT: shldl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test11:
+; X64: # BB#0:
+; X64-NEXT: andl $31, %edx
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shldl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%and = and i32 %bits, 31
%and32 = sub i32 32, %and
%sh_lo = lshr i32 %lo, %and32
@@ -216,15 +298,23 @@ define i32 @test11(i32 %hi, i32 %lo, i32
}
define i32 @test12(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test12:
-; CHECK: # BB#0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: andl $31, %ecx
-; CHECK-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test12:
+; X86: # BB#0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test12:
+; X64: # BB#0:
+; X64-NEXT: andl $31, %edx
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shrdl %cl, %edi, %esi
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: retq
%and = and i32 %bits, 31
%and32 = sub i32 32, %and
%sh_lo = shl i32 %hi, %and32
@@ -234,13 +324,20 @@ define i32 @test12(i32 %hi, i32 %lo, i32
}
define i32 @test13(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test13:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shldl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test13:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test13:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shldl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%bits32 = sub i32 32, %bits
%sh_lo = lshr i32 %lo, %bits32
%sh_hi = shl i32 %hi, %bits
@@ -249,13 +346,20 @@ define i32 @test13(i32 %hi, i32 %lo, i32
}
define i32 @test14(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test14:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test14:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test14:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shrdl %cl, %edi, %esi
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: retq
%bits32 = sub i32 32, %bits
%sh_lo = shl i32 %hi, %bits32
%sh_hi = lshr i32 %lo, %bits
@@ -264,13 +368,20 @@ define i32 @test14(i32 %hi, i32 %lo, i32
}
define i32 @test15(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test15:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shldl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test15:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shldl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test15:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shldl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%bits32 = xor i32 %bits, 31
%lo2 = lshr i32 %lo, 1
%sh_lo = lshr i32 %lo2, %bits32
@@ -280,13 +391,20 @@ define i32 @test15(i32 %hi, i32 %lo, i32
}
define i32 @test16(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test16:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test16:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test16:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shrdl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%bits32 = xor i32 %bits, 31
%lo2 = shl i32 %lo, 1
%sh_lo = shl i32 %lo2, %bits32
@@ -296,13 +414,20 @@ define i32 @test16(i32 %hi, i32 %lo, i32
}
define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind {
-; CHECK-LABEL: test17:
-; CHECK: # BB#0:
-; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: shrdl %cl, %edx, %eax
-; CHECK-NEXT: retl
+; X86-LABEL: test17:
+; X86: # BB#0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrdl %cl, %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test17:
+; X64: # BB#0:
+; X64-NEXT: movl %edx, %ecx
+; X64-NEXT: shrdl %cl, %esi, %edi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: retq
%bits32 = xor i32 %bits, 31
%lo2 = add i32 %lo, %lo
%sh_lo = shl i32 %lo2, %bits32
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