[PATCH] D36795: [SystemZ] Increase number of LOCRs emitted by passing regalloc hints

Jonas Paulsson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 10 00:45:59 PST 2017


jonpa added inline comments.


================
Comment at: lib/Target/SystemZ/SystemZRegisterInfo.cpp:38
+    return &SystemZ::GR32BitRegClass;
+  if (RC == &SystemZ::GRH32BitRegClass ||
+      MO.getSubReg() == SystemZ::subreg_h32)
----------------
uweigand wrote:
> jonpa wrote:
> > uweigand wrote:
> > > Should this also use hasSubClassEq, just for symmetry with the case above?
> > I take it that while GR32BitRegClass has the ADDR32Bit sub class, which GRH32BitRegClass does not, you prefer to keep this general for the future and so on?
> Yes, exactly ... just in case there will be subclasses later.
Right. Fixed.


================
Comment at: lib/Target/SystemZ/SystemZRegisterInfo.cpp:103
+
+  return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM);
+}
----------------
uweigand wrote:
> Should we now pass Matrix also back to the default implementation?
Oops. Fixed with NFC.


https://reviews.llvm.org/D36795





More information about the llvm-commits mailing list