[PATCH] D29937: [RISCV 15/n] Implement lowering of ISD::SELECT
John Russo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 9 16:18:13 PST 2017
johnrusso added inline comments.
================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:173
+ // -> (riscvisd::select_cc condv, zero, setne, truev, falsev)
+ SDValue Zero = DAG.getConstant(0, DL, XLenVT);
+ SDValue SetNE = DAG.getConstant(ISD::SETNE, DL, XLenVT);
----------------
I noticed that the select-cc.ll test didn't cover this code.
This little snip with the correct matching pattern should cover it.
...
%val20 = select i1 %tst10, i32 %val18, i32 %val19
%tr3 = trunc i32 %val3 to i1
%val21 = select i1 %tr3, i32 %val20, i32 %val19
ret i32 %val21
================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:188
+
+ assert(MI.getOpcode() == RISCV::Select_GPR_Using_CC_GPR &&
+ "Unexpected instr type to insert");
----------------
Could we use a 'switch(MI.getOpcode())' here and assert on an unhandled opcode if it occurs. I suspect other pseudos may require a custom inserter in the future.
https://reviews.llvm.org/D29937
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