[PATCH] D39847: [X86] Avoid unecessary opsize byte in segment move to memory

[Nirav Dave via Phabricator via llvm-commits]

niravd created this revision.
Herald added a subscriber: hiraditya.

Segment move to memory are always 16-bit regardless of opsize
modifier. Modify instructions to elide modifier byte as gas does.

Fixes PR34478.


https://reviews.llvm.org/D39847

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/MC/X86/x86-16.s
  llvm/test/MC/X86/x86-32.s


Index: llvm/test/MC/X86/x86-32.s
===================================================================
--- llvm/test/MC/X86/x86-32.s
+++ llvm/test/MC/X86/x86-32.s
@@ -359,8 +359,8 @@
 // CHECK:  encoding: [0x8c,0x08]
         movl %cs, (%eax)
 
-// CHECK: movw	%cs, (%eax)
-// CHECK:  encoding: [0x66,0x8c,0x08]
+// CHECK: movl	%cs, (%eax)
+// CHECK:  encoding: [0x8c,0x08]
         movw %cs, (%eax)
 
 // CHECK: movl	%eax, %cs
Index: llvm/test/MC/X86/x86-16.s
===================================================================
--- llvm/test/MC/X86/x86-16.s
+++ llvm/test/MC/X86/x86-16.s
@@ -248,8 +248,8 @@
 // CHECK:  encoding: [0x8c,0xc8]
         movw %cs, %ax
 
-// CHECK: movl	%cs, (%eax)
-// CHECK:  encoding: [0x67,0x66,0x8c,0x08]
+// CHECK: movw	%cs, (%eax)
+// CHECK:  encoding: [0x67,0x8c,0x08]
         movl %cs, (%eax)
 
 // CHECK: movw	%cs, (%eax)
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2435,13 +2435,13 @@
     static_cast<X86Operand &>(*Operands[0]).setTokenValue(Repl);
   }
 
-  // Moving a 32 or 16 bit value into a segment register has the same
-  // behavior. Modify such instructions to always take shorter form.
+  // Avoid unecessary OpSize bytes from moves involving segment registers.
   if ((Name == "mov" || Name == "movw" || Name == "movl") &&
       (Operands.size() == 3)) {
     X86Operand &Op1 = (X86Operand &)*Operands[1];
     X86Operand &Op2 = (X86Operand &)*Operands[2];
     SMLoc Loc = Op1.getEndLoc();
+    // Moving a 32 or 16 bit reg to a segment register has the same behavior.
     if (Op1.isReg() && Op2.isReg() &&
         X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(
             Op2.getReg()) &&
@@ -2457,6 +2457,16 @@
           getX86SubSuperRegisterOrZero(Op1.getReg(), is16BitMode() ? 16 : 32);
       Operands[1] = X86Operand::CreateReg(Reg, Loc, Loc);
     }
+    // All movs of segment to memory is always 16-bits.
+    else if (Op1.isReg() &&
+             X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(
+                 Op1.getReg()) &&
+             Op2.isMem()) {
+      if (Name != "mov" && Name[3] == (is16BitMode() ? 'l' : 'w')) {
+        Name = is16BitMode() ? "movw" : "movl";
+        Operands[0] = X86Operand::CreateToken(Name, NameLoc);
+      }
+    }
   }
 
   // This is a terrible hack to handle "out[s]?[bwl]? %al, (%dx)" ->


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