[PATCH] D39822: [NVPTX] Model (some) side effects of warp-synchronous data exchange intrinsics.
Arpith Jacob via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 9 07:53:23 PST 2017
arpith-jacob added a comment.
I was not sure if the *_sync intrinsics required preventing CSE since these intrinsics capture all state as arguments (lanes in a warp to sync as an argument). However, on Volta, I think different lanes in a warp can execute the intrinsic from different syntactic locations (i.e., different program counters). If true, then we do indeed have to model the data exchanged.
https://reviews.llvm.org/D39822
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