[PATCH] D37983: Add instruction subset for the ARC backend
Pete Couperus via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 8 08:35:42 PST 2017
petecoup accepted this revision.
petecoup added a comment.
This revision is now accepted and ready to land.
Hi Tatyana,
Thanks for the delay, I only have a couple other minor things.
================
Comment at: lib/Target/ARC/Disassembler/ARCDisassembler.cpp:275
+ DEBUG(dbgs() << "Decoding MOV_S h-register\n");
+ auto h = fieldFromInstruction(Insn, 5, 3) |
+ (fieldFromInstruction(Insn, 0, 2) << 3);
----------------
Can we use the appropriate unsigned type, rather than auto?
================
Comment at: lib/Target/ARC/Disassembler/ARCDisassembler.cpp:280
+
+ auto DecodeRegisterOrImm = [&Inst, Address, Decoder](decltype(h) field,
+ decltype(Insn) value) {
----------------
Can we pull this out into another static routine?
Repository:
rL LLVM
https://reviews.llvm.org/D37983
More information about the llvm-commits
mailing list