[PATCH] D39792: [AArch64][SVE] Asm: More concise test format

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

Thanks Sander, it looks like you incorporated the suggestions from https://reviews.llvm.org/D39091  and  I think with the new format it is much easier to see what's going on!

That being said, it seems like we do not test passing invalid operands to SVE instructions (with +sve), , i.e. all assembler instructions are valid SVE instructions. We should also have tests with invalid operands, e.g. `sub z99.s, z0.s, z0.s`, `sub z0.X, z0.X, z0.X`, `sub z0.s, z0.h, z0.d`, `sub x0, z0.h, z0.h`.


https://reviews.llvm.org/D39792