[PATCH] D39712: [ARM] Add an alias for psr

[Leslie Zhai via Phabricator via llvm-commits]

xiangzhai created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

Hi LLVM developers,

As Eli suggested in the PR35213 <https://bugs.llvm.org/show_bug.cgi?id=35213>, I simply added an alias for `psr` register, please review my patch, thanks a lot!

Regards,
Leslie Zhai


Repository:
  rL LLVM

https://reviews.llvm.org/D39712

Files:
  lib/Target/ARM/ARMSystemRegister.td
  test/MC/ARM/arm-thumb-cpus-default.s


Index: test/MC/ARM/arm-thumb-cpus-default.s
===================================================================
--- test/MC/ARM/arm-thumb-cpus-default.s
+++ test/MC/ARM/arm-thumb-cpus-default.s
@@ -19,6 +19,8 @@
         @ Make sure the architecture chosen by LLVM defaults to a compatible
         @ ARM/Thumb mode.
         movs r0, r0
+        mrs ip, psr
 @ CHECK-ARM-THUMB: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
 @ CHECK-ARM-ONLY: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
 @ CHECK-THUMB-ONLY: movs r0, r0 @ encoding: [0x00,0x00]
+@ CHECK-THUMB-ONLY: mrs ip, psr @ encoding: [0xef,0xf3,0x04,0x8c]
Index: lib/Target/ARM/ARMSystemRegister.td
===================================================================
--- lib/Target/ARM/ARMSystemRegister.td
+++ lib/Target/ARM/ARMSystemRegister.td
@@ -63,6 +63,7 @@
 def : MClassSysReg<1,    1,    0,    0x802, "eapsr_nzcvq">;
 def : MClassSysReg<0,    0,    1,    0x803, "xpsr">;
 def : MClassSysReg<1,    1,    0,    0x803, "xpsr_nzcvq">;
+def : MClassSysReg<0,    0,    1,    0x804, "psr">;
 
 def : MClassSysReg<0,    0,    1,    0x805, "ipsr">;
 def : MClassSysReg<0,    0,    1,    0x806, "epsr">;


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