[PATCH] D38196: [AArch64] Avoid interleaved SIMD store instructions for Exynos
    Abderrazek Zaafrani via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Nov  6 17:06:22 PST 2017
    
    
  
az updated this revision to Diff 121818.
az added a comment.
Adding subtarget as part of key and simplifying some code.
https://reviews.llvm.org/D38196
Files:
  llvm/lib/Target/AArch64/AArch64.h
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp
  llvm/test/CodeGen/AArch64/arm64-st1.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D38196.121818.patch
Type: text/x-patch
Size: 39034 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171107/11ad64e5/attachment.bin>
    
    
More information about the llvm-commits
mailing list