[PATCH] D39636: [X86] Don't clobber reserved registers with stack adjustments

[Reid Kleckner via Phabricator via llvm-commits]

rnk added a comment.

lgtm

I guess we were just getting lucky before. We could only go at most 4 deep into the GR32_NOREX_NOSP class, which is more or less:

  def GR32 : RegisterClass<"X86", [i32], 32,
                           (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP,
                                R8D, R9D, R10D, R11D, R14D, R15D, R12D, R13D)>;

If we used EBX on Windows instead, we'd avoid this bug as well.


https://reviews.llvm.org/D39636