[llvm] r317442 - [X86] Add missing predicate to a pattern. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 5 13:14:07 PST 2017


Author: ctopper
Date: Sun Nov  5 13:14:06 2017
New Revision: 317442

URL: http://llvm.org/viewvc/llvm-project?rev=317442&view=rev
Log:
[X86] Add missing predicate to a pattern. NFC

Other patterns had higher priority so this wasn't noticed. But we shouldn't be dependent on pattern order.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrAVX512.td

Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=317442&r1=317441&r2=317442&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun Nov  5 13:14:06 2017
@@ -7618,6 +7618,7 @@ multiclass avx512_sqrt_scalar<bits<8> op
   }
   }
 
+let Predicates = [HasAVX512] in {
   def : Pat<(_.EltVT (OpNode _.FRC:$src)),
             (!cast<Instruction>(NAME#SUFF#Zr)
                 (_.EltVT (IMPLICIT_DEF)), _.FRC:$src)>;
@@ -7626,6 +7627,7 @@ multiclass avx512_sqrt_scalar<bits<8> op
             (!cast<Instruction>(NAME#SUFF#Zm)
                 (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[HasAVX512, OptForSize]>;
 }
+}
 
 multiclass avx512_sqrt_scalar_all<bits<8> opc, string OpcodeStr> {
   defm SSZ : avx512_sqrt_scalar<opc, OpcodeStr#"ss", f32x_info, "SS", fsqrt,




More information about the llvm-commits mailing list