[PATCH] D39415: [ARMISelLowering] Better handling of NEON load/store for sequential memory regions

Eugene Leviant via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 2 08:07:48 PDT 2017


evgeny777 updated this revision to Diff 121306.
evgeny777 added a comment.

- Fixed bug caused by incorrect negative increment handling. Added test case.
- If we can't select best possible increment value we now return the first one instead of the last one
- Addressed some of review comments
- Fixed issues in ivchain-ARM.ll test case

@rovka : I've run the LLVM test suite (with --compile-only) and it worked fine for me (no assertions, e.t.c). I haven't run it yet, though.


https://reviews.llvm.org/D39415

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  test/CodeGen/ARM/alloc-no-stack-realign.ll
  test/CodeGen/ARM/cascade-vld-vst.ll
  test/CodeGen/ARM/memcpy-inline.ll
  test/CodeGen/ARM/misched-fusion-aes.ll
  test/CodeGen/ARM/vector-load.ll
  test/CodeGen/ARM/vext.ll
  test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll

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