[PATCH] D39089: [AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 31 09:53:02 PDT 2017


sdesmalen added inline comments.


================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:187
     k_ShiftExtend,
+    k_SVERegister,
     k_FPImm,
----------------
fhahn wrote:
> Will we have a separate kind for predicate registers? Or should this be SVEDataRegister too?
There will be a separate SVEPredicateRegister as well.


================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:3270
 
+static inline bool isMatchingOrAlias(unsigned ZReg, unsigned Reg) {
+  assert((ZReg >= AArch64::Z0) && (ZReg <= AArch64::Z31));
----------------
fhahn wrote:
> where is this used?
Not anywhere in this patch it seems, it is part of a future patch. I have removed it in this one.


https://reviews.llvm.org/D39089





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