[llvm] r316831 - [SelectionDAG] Support 'bit preserving' floating points bitcasts on computeKnownBits/ComputeNumSignBits
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 28 07:27:53 PDT 2017
Author: rksimon
Date: Sat Oct 28 07:27:53 2017
New Revision: 316831
URL: http://llvm.org/viewvc/llvm-project?rev=316831&view=rev
Log:
[SelectionDAG] Support 'bit preserving' floating points bitcasts on computeKnownBits/ComputeNumSignBits
For cases where we know the floating point representations match the bitcasted integer equivalent, allow bitcasting to these types.
This is especially useful for the X86 floating point compare results which return all/zero bits but as a floating point type.
Differential Revision: https://reviews.llvm.org/D39289
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll
llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
llvm/trunk/test/CodeGen/X86/cast-vsel.ll
llvm/trunk/test/CodeGen/X86/combine-fcopysign.ll
llvm/trunk/test/CodeGen/X86/machine-cp.ll
llvm/trunk/test/CodeGen/X86/vector-compare-results.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Oct 28 07:27:53 2017
@@ -2096,6 +2096,12 @@ void SelectionDAG::computeKnownBits(SDVa
Known.Zero = ~Known.One;
return;
}
+ if (auto *C = dyn_cast<ConstantFPSDNode>(Op)) {
+ // We know all of the bits for a constant fp!
+ Known.One = C->getValueAPF().bitcastToAPInt();
+ Known.Zero = ~Known.One;
+ return;
+ }
if (Depth == 6)
return; // Limit search depth.
@@ -2219,10 +2225,11 @@ void SelectionDAG::computeKnownBits(SDVa
}
case ISD::BITCAST: {
SDValue N0 = Op.getOperand(0);
- unsigned SubBitWidth = N0.getScalarValueSizeInBits();
+ EVT SubVT = N0.getValueType();
+ unsigned SubBitWidth = SubVT.getScalarSizeInBits();
- // Ignore bitcasts from floating point.
- if (!N0.getValueType().isInteger())
+ // Ignore bitcasts from unsupported types.
+ if (!(SubVT.isInteger() || SubVT.isFloatingPoint()))
break;
// Fast handling of 'identity' bitcasts.
@@ -2960,7 +2967,7 @@ unsigned SelectionDAG::ComputeNumSignBit
unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
unsigned Depth) const {
EVT VT = Op.getValueType();
- assert(VT.isInteger() && "Invalid VT!");
+ assert((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!");
unsigned VTBits = VT.getScalarSizeInBits();
unsigned NumElts = DemandedElts.getBitWidth();
unsigned Tmp, Tmp2;
@@ -3041,10 +3048,11 @@ unsigned SelectionDAG::ComputeNumSignBit
case ISD::BITCAST: {
SDValue N0 = Op.getOperand(0);
- unsigned SrcBits = N0.getScalarValueSizeInBits();
+ EVT SrcVT = N0.getValueType();
+ unsigned SrcBits = SrcVT.getScalarSizeInBits();
- // Ignore bitcasts from floating point.
- if (!N0.getValueType().isInteger())
+ // Ignore bitcasts from unsupported types..
+ if (!(SrcVT.isInteger() || SrcVT.isFloatingPoint()))
break;
// Fast handling of 'identity' bitcasts.
Modified: llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll Sat Oct 28 07:27:53 2017
@@ -1245,7 +1245,7 @@ define <2 x i64> @test46(<2 x float> %x,
; KNL: ## BB#0:
; KNL-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
; KNL-NEXT: vpmovsxdq %xmm0, %xmm0
-; KNL-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
+; KNL-NEXT: vpsrlq $63, %xmm0, %xmm0
; KNL-NEXT: retq
;
; SKX-LABEL: test46:
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll Sat Oct 28 07:27:53 2017
@@ -274,50 +274,19 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
}
define i8 @v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %c, <8 x float> %d) {
-; SSE2-LABEL: v8f32:
-; SSE2: # BB#0:
-; SSE2-NEXT: cmpltps %xmm1, %xmm3
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm3[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; SSE2-NEXT: cmpltps %xmm0, %xmm2
-; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm2[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE2-NEXT: cmpltps %xmm5, %xmm7
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm7[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; SSE2-NEXT: cmpltps %xmm4, %xmm6
-; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm6[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
-; SSE2-NEXT: pand %xmm0, %xmm2
-; SSE2-NEXT: packsswb %xmm0, %xmm2
-; SSE2-NEXT: pmovmskb %xmm2, %eax
-; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-NEXT: ret{{[l|q]}}
-;
-; SSSE3-LABEL: v8f32:
-; SSSE3: # BB#0:
-; SSSE3-NEXT: cmpltps %xmm1, %xmm3
-; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; SSSE3-NEXT: pshufb %xmm1, %xmm3
-; SSSE3-NEXT: cmpltps %xmm0, %xmm2
-; SSSE3-NEXT: pshufb %xmm1, %xmm2
-; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; SSSE3-NEXT: cmpltps %xmm5, %xmm7
-; SSSE3-NEXT: pshufb %xmm1, %xmm7
-; SSSE3-NEXT: cmpltps %xmm4, %xmm6
-; SSSE3-NEXT: pshufb %xmm1, %xmm6
-; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
-; SSSE3-NEXT: pand %xmm2, %xmm6
-; SSSE3-NEXT: packsswb %xmm0, %xmm6
-; SSSE3-NEXT: pmovmskb %xmm6, %eax
-; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSSE3-NEXT: ret{{[l|q]}}
+; SSE2-SSSE3-LABEL: v8f32:
+; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3-NEXT: cmpltps %xmm1, %xmm3
+; SSE2-SSSE3-NEXT: cmpltps %xmm0, %xmm2
+; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
+; SSE2-SSSE3-NEXT: cmpltps %xmm5, %xmm7
+; SSE2-SSSE3-NEXT: cmpltps %xmm4, %xmm6
+; SSE2-SSSE3-NEXT: packssdw %xmm7, %xmm6
+; SSE2-SSSE3-NEXT: pand %xmm2, %xmm6
+; SSE2-SSSE3-NEXT: packsswb %xmm0, %xmm6
+; SSE2-SSSE3-NEXT: pmovmskb %xmm6, %eax
+; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v8f32:
; AVX12: # BB#0:
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll Sat Oct 28 07:27:53 2017
@@ -135,15 +135,10 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
define i8 @v8f64(<8 x double> %a, <8 x double> %b, <8 x double> %c, <8 x double> %d) {
; SSE-LABEL: v8f64:
; SSE: # BB#0:
+; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm10
-; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm11
-; SSE-NEXT: cmpltpd %xmm3, %xmm7
-; SSE-NEXT: cmpltpd %xmm2, %xmm6
-; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm7[0,2]
-; SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,4,5,6,7,0,1,4,5,8,9,12,13]
-; SSE-NEXT: pshufb %xmm2, %xmm6
; SSE-NEXT: cmpltpd %xmm1, %xmm5
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm5[0,2,2,3,4,5,6,7]
@@ -151,24 +146,28 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm4[0,2,2,3,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm6[4,5,6,7]
+; SSE-NEXT: cmpltpd %xmm3, %xmm7
+; SSE-NEXT: cmpltpd %xmm2, %xmm6
+; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm7[0,2]
+; SSE-NEXT: packssdw %xmm6, %xmm6
+; SSE-NEXT: pblendw {{.*#+}} xmm6 = xmm0[0,1,2,3],xmm6[4,5,6,7]
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm11
-; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm8
-; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2],xmm11[0,2]
-; SSE-NEXT: pshufb %xmm2, %xmm8
+; SSE-NEXT: shufps {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm11[0,2,2,3,4,5,6,7]
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm10[0,2,2,3,4,5,6,7]
+; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm9
-; SSE-NEXT: shufps {{.*#+}} xmm9 = xmm9[0,2,2,3]
-; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm9[0,2,2,3,4,5,6,7]
-; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
-; SSE-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm8[4,5,6,7]
-; SSE-NEXT: pand %xmm0, %xmm2
-; SSE-NEXT: psllw $15, %xmm2
-; SSE-NEXT: psraw $15, %xmm2
-; SSE-NEXT: packsswb %xmm0, %xmm2
-; SSE-NEXT: pmovmskb %xmm2, %eax
+; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm8
+; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2],xmm9[0,2]
+; SSE-NEXT: packssdw %xmm8, %xmm8
+; SSE-NEXT: pblendw {{.*#+}} xmm8 = xmm1[0,1,2,3],xmm8[4,5,6,7]
+; SSE-NEXT: pand %xmm6, %xmm8
+; SSE-NEXT: psllw $15, %xmm8
+; SSE-NEXT: psraw $15, %xmm8
+; SSE-NEXT: packsswb %xmm0, %xmm8
+; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; SSE-NEXT: ret{{[l|q]}}
;
@@ -718,37 +717,23 @@ define i16 @v16f32(<16 x float> %a, <16
; SSE-LABEL: v16f32:
; SSE: # BB#0:
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm8
-; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm9
+; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: cmpltps %xmm3, %xmm7
-; SSE-NEXT: movdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; SSE-NEXT: pshufb %xmm3, %xmm7
; SSE-NEXT: cmpltps %xmm2, %xmm6
-; SSE-NEXT: pshufb %xmm3, %xmm6
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm7[0]
-; SSE-NEXT: movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
-; SSE-NEXT: pshufb %xmm2, %xmm6
+; SSE-NEXT: packssdw %xmm7, %xmm6
; SSE-NEXT: cmpltps %xmm1, %xmm5
-; SSE-NEXT: pshufb %xmm3, %xmm5
; SSE-NEXT: cmpltps %xmm0, %xmm4
-; SSE-NEXT: pshufb %xmm3, %xmm4
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm5[0]
-; SSE-NEXT: pshufb %xmm2, %xmm4
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm6[0]
+; SSE-NEXT: packssdw %xmm5, %xmm4
+; SSE-NEXT: packsswb %xmm6, %xmm4
; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm11
-; SSE-NEXT: pshufb %xmm3, %xmm11
-; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm9
-; SSE-NEXT: pshufb %xmm3, %xmm9
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm9 = xmm9[0],xmm11[0]
-; SSE-NEXT: pshufb %xmm2, %xmm9
; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm10
-; SSE-NEXT: pshufb %xmm3, %xmm10
+; SSE-NEXT: packssdw %xmm11, %xmm10
+; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm8
-; SSE-NEXT: pshufb %xmm3, %xmm8
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm8 = xmm8[0],xmm10[0]
-; SSE-NEXT: pshufb %xmm2, %xmm8
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm8 = xmm8[0],xmm9[0]
+; SSE-NEXT: packssdw %xmm9, %xmm8
+; SSE-NEXT: packsswb %xmm10, %xmm8
; SSE-NEXT: pand %xmm4, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
@@ -759,22 +744,17 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX12-NEXT: vcmpltps %ymm1, %ymm3, %ymm1
; AVX12-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX12-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
-; AVX12-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
-; AVX12-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX12-NEXT: vcmpltps %ymm0, %ymm2, %ymm0
; AVX12-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX12-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
-; AVX12-NEXT: vpshufb %xmm3, %xmm0, %xmm0
-; AVX12-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; AVX12-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vcmpltps %ymm5, %ymm7, %ymm1
; AVX12-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX12-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
-; AVX12-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX12-NEXT: vcmpltps %ymm4, %ymm6, %ymm2
-; AVX12-NEXT: vextractf128 $1, %ymm2, %xmm4
-; AVX12-NEXT: vpackssdw %xmm4, %xmm2, %xmm2
-; AVX12-NEXT: vpshufb %xmm3, %xmm2, %xmm2
-; AVX12-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
+; AVX12-NEXT: vextractf128 $1, %ymm2, %xmm3
+; AVX12-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
+; AVX12-NEXT: vpacksswb %xmm1, %xmm2, %xmm1
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
Modified: llvm/trunk/test/CodeGen/X86/cast-vsel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cast-vsel.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cast-vsel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cast-vsel.ll Sat Oct 28 07:27:53 2017
@@ -12,38 +12,27 @@ define <8 x i32> @sext(<8 x float> %a, <
; SSE2-LABEL: sext:
; SSE2: # BB#0:
; SSE2-NEXT: cmpltps %xmm3, %xmm1
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE2-NEXT: cmpltps %xmm2, %xmm0
-; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
-; SSE2-NEXT: pand %xmm2, %xmm4
-; SSE2-NEXT: pandn %xmm5, %xmm2
-; SSE2-NEXT: por %xmm4, %xmm2
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SSE2-NEXT: psrad $16, %xmm0
-; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SSE2-NEXT: packssdw %xmm1, %xmm0
+; SSE2-NEXT: pand %xmm0, %xmm4
+; SSE2-NEXT: pandn %xmm5, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
+; SSE2-NEXT: psrad $16, %xmm2
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; SSE2-NEXT: psrad $16, %xmm1
+; SSE2-NEXT: movdqa %xmm2, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: sext:
; SSE41: # BB#0:
; SSE41-NEXT: cmpltps %xmm3, %xmm1
-; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; SSE41-NEXT: pshufb %xmm3, %xmm1
; SSE41-NEXT: cmpltps %xmm2, %xmm0
-; SSE41-NEXT: pshufb %xmm3, %xmm0
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE41-NEXT: pand %xmm0, %xmm4
-; SSE41-NEXT: pandn %xmm5, %xmm0
-; SSE41-NEXT: por %xmm4, %xmm0
-; SSE41-NEXT: pmovsxwd %xmm0, %xmm2
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
-; SSE41-NEXT: pmovsxwd %xmm0, %xmm1
-; SSE41-NEXT: movdqa %xmm2, %xmm0
+; SSE41-NEXT: packssdw %xmm1, %xmm0
+; SSE41-NEXT: pblendvb %xmm0, %xmm4, %xmm5
+; SSE41-NEXT: pmovsxwd %xmm5, %xmm0
+; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm5[2,3,0,1]
+; SSE41-NEXT: pmovsxwd %xmm1, %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: sext:
@@ -76,39 +65,29 @@ define <8 x i32> @sext(<8 x float> %a, <
define <8 x i32> @zext(<8 x float> %a, <8 x float> %b, <8 x i16> %c, <8 x i16> %d) {
; SSE2-LABEL: zext:
; SSE2: # BB#0:
+; SSE2-NEXT: movaps %xmm0, %xmm6
; SSE2-NEXT: cmpltps %xmm3, %xmm1
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,2,2,3]
-; SSE2-NEXT: cmpltps %xmm2, %xmm0
-; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
-; SSE2-NEXT: pand %xmm1, %xmm4
-; SSE2-NEXT: pandn %xmm5, %xmm1
-; SSE2-NEXT: por %xmm4, %xmm1
-; SSE2-NEXT: xorps %xmm2, %xmm2
-; SSE2-NEXT: movdqa %xmm1, %xmm0
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SSE2-NEXT: cmpltps %xmm2, %xmm6
+; SSE2-NEXT: packssdw %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm6, %xmm4
+; SSE2-NEXT: pandn %xmm5, %xmm6
+; SSE2-NEXT: por %xmm4, %xmm6
+; SSE2-NEXT: pxor %xmm1, %xmm1
+; SSE2-NEXT: movdqa %xmm6, %xmm0
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm1[4],xmm6[5],xmm1[5],xmm6[6],xmm1[6],xmm6[7],xmm1[7]
+; SSE2-NEXT: movdqa %xmm6, %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: zext:
; SSE41: # BB#0:
; SSE41-NEXT: cmpltps %xmm3, %xmm1
-; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; SSE41-NEXT: pshufb %xmm3, %xmm1
; SSE41-NEXT: cmpltps %xmm2, %xmm0
-; SSE41-NEXT: pshufb %xmm3, %xmm0
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE41-NEXT: pand %xmm0, %xmm4
-; SSE41-NEXT: pandn %xmm5, %xmm0
-; SSE41-NEXT: por %xmm4, %xmm0
-; SSE41-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
-; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE41-NEXT: movdqa %xmm2, %xmm0
+; SSE41-NEXT: packssdw %xmm1, %xmm0
+; SSE41-NEXT: pblendvb %xmm0, %xmm4, %xmm5
+; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero
+; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm5[2,3,0,1]
+; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
; SSE41-NEXT: retq
;
; AVX1-LABEL: zext:
@@ -306,25 +285,13 @@ define void @example25() nounwind {
; SSE2-NEXT: movaps da+4096(%rax), %xmm1
; SSE2-NEXT: movaps da+4112(%rax), %xmm2
; SSE2-NEXT: cmpltps db+4112(%rax), %xmm2
-; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE2-NEXT: cmpltps db+4096(%rax), %xmm1
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; SSE2-NEXT: packssdw %xmm2, %xmm1
; SSE2-NEXT: movaps dc+4096(%rax), %xmm2
; SSE2-NEXT: movaps dc+4112(%rax), %xmm3
; SSE2-NEXT: cmpltps dd+4112(%rax), %xmm3
-; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-NEXT: cmpltps dd+4096(%rax), %xmm2
-; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; SSE2-NEXT: packssdw %xmm3, %xmm2
; SSE2-NEXT: pand %xmm1, %xmm2
; SSE2-NEXT: movdqa %xmm2, %xmm1
; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
@@ -341,32 +308,27 @@ define void @example25() nounwind {
; SSE41-LABEL: example25:
; SSE41: # BB#0: # %vector.ph
; SSE41-NEXT: movq $-4096, %rax # imm = 0xF000
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,1,1,1]
+; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
; SSE41-NEXT: .p2align 4, 0x90
; SSE41-NEXT: .LBB5_1: # %vector.body
; SSE41-NEXT: # =>This Inner Loop Header: Depth=1
-; SSE41-NEXT: movaps da+4096(%rax), %xmm2
-; SSE41-NEXT: movaps da+4112(%rax), %xmm3
-; SSE41-NEXT: cmpltps db+4112(%rax), %xmm3
-; SSE41-NEXT: pshufb %xmm0, %xmm3
-; SSE41-NEXT: cmpltps db+4096(%rax), %xmm2
-; SSE41-NEXT: pshufb %xmm0, %xmm2
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; SSE41-NEXT: movaps dc+4096(%rax), %xmm3
-; SSE41-NEXT: movaps dc+4112(%rax), %xmm4
-; SSE41-NEXT: cmpltps dd+4112(%rax), %xmm4
-; SSE41-NEXT: pshufb %xmm0, %xmm4
-; SSE41-NEXT: cmpltps dd+4096(%rax), %xmm3
-; SSE41-NEXT: pshufb %xmm0, %xmm3
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
-; SSE41-NEXT: pand %xmm2, %xmm3
-; SSE41-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
+; SSE41-NEXT: movaps da+4096(%rax), %xmm1
+; SSE41-NEXT: movaps da+4112(%rax), %xmm2
+; SSE41-NEXT: cmpltps db+4112(%rax), %xmm2
+; SSE41-NEXT: cmpltps db+4096(%rax), %xmm1
+; SSE41-NEXT: packssdw %xmm2, %xmm1
+; SSE41-NEXT: movaps dc+4096(%rax), %xmm2
+; SSE41-NEXT: movaps dc+4112(%rax), %xmm3
+; SSE41-NEXT: cmpltps dd+4112(%rax), %xmm3
+; SSE41-NEXT: cmpltps dd+4096(%rax), %xmm2
+; SSE41-NEXT: packssdw %xmm3, %xmm2
; SSE41-NEXT: pand %xmm1, %xmm2
-; SSE41-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
-; SSE41-NEXT: pand %xmm1, %xmm3
-; SSE41-NEXT: movdqa %xmm3, dj+4112(%rax)
-; SSE41-NEXT: movdqa %xmm2, dj+4096(%rax)
+; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
+; SSE41-NEXT: pand %xmm0, %xmm1
+; SSE41-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; SSE41-NEXT: pand %xmm0, %xmm2
+; SSE41-NEXT: movdqa %xmm2, dj+4112(%rax)
+; SSE41-NEXT: movdqa %xmm1, dj+4096(%rax)
; SSE41-NEXT: addq $32, %rax
; SSE41-NEXT: jne .LBB5_1
; SSE41-NEXT: # BB#2: # %for.end
@@ -459,14 +421,8 @@ define void @example24(i16 signext %x, i
; SSE2-NEXT: movaps da+4096(%rax), %xmm2
; SSE2-NEXT: movaps da+4112(%rax), %xmm3
; SSE2-NEXT: cmpltps db+4112(%rax), %xmm3
-; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-NEXT: cmpltps db+4096(%rax), %xmm2
-; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; SSE2-NEXT: packssdw %xmm3, %xmm2
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pand %xmm2, %xmm3
; SSE2-NEXT: pandn %xmm1, %xmm2
@@ -486,31 +442,26 @@ define void @example24(i16 signext %x, i
; SSE41: # BB#0: # %vector.ph
; SSE41-NEXT: movd %edi, %xmm0
; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
-; SSE41-NEXT: movd %esi, %xmm1
-; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
-; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
+; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,1]
+; SSE41-NEXT: movd %esi, %xmm0
+; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
+; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,1,1]
; SSE41-NEXT: movq $-4096, %rax # imm = 0xF000
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSE41-NEXT: .p2align 4, 0x90
; SSE41-NEXT: .LBB6_1: # %vector.body
; SSE41-NEXT: # =>This Inner Loop Header: Depth=1
-; SSE41-NEXT: movaps da+4096(%rax), %xmm3
-; SSE41-NEXT: movaps da+4112(%rax), %xmm4
-; SSE41-NEXT: cmpltps db+4112(%rax), %xmm4
-; SSE41-NEXT: pshufb %xmm2, %xmm4
-; SSE41-NEXT: cmpltps db+4096(%rax), %xmm3
-; SSE41-NEXT: pshufb %xmm2, %xmm3
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pand %xmm3, %xmm4
-; SSE41-NEXT: pandn %xmm1, %xmm3
-; SSE41-NEXT: por %xmm4, %xmm3
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[2,3,0,1]
-; SSE41-NEXT: pmovsxwd %xmm4, %xmm4
+; SSE41-NEXT: movaps da+4096(%rax), %xmm0
+; SSE41-NEXT: movaps da+4112(%rax), %xmm3
+; SSE41-NEXT: cmpltps db+4112(%rax), %xmm3
+; SSE41-NEXT: cmpltps db+4096(%rax), %xmm0
+; SSE41-NEXT: packssdw %xmm3, %xmm0
+; SSE41-NEXT: movdqa %xmm2, %xmm3
+; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm3
+; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm3[2,3,0,1]
+; SSE41-NEXT: pmovsxwd %xmm0, %xmm0
; SSE41-NEXT: pmovsxwd %xmm3, %xmm3
; SSE41-NEXT: movdqa %xmm3, dj+4096(%rax)
-; SSE41-NEXT: movdqa %xmm4, dj+4112(%rax)
+; SSE41-NEXT: movdqa %xmm0, dj+4112(%rax)
; SSE41-NEXT: addq $32, %rax
; SSE41-NEXT: jne .LBB6_1
; SSE41-NEXT: # BB#2: # %for.end
Modified: llvm/trunk/test/CodeGen/X86/combine-fcopysign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-fcopysign.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-fcopysign.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-fcopysign.ll Sat Oct 28 07:27:53 2017
@@ -113,20 +113,15 @@ define <4 x float> @combine_vec_fcopysig
define <4 x float> @combine_vec_fcopysign_fneg_fabs_sgn(<4 x float> %x, <4 x float> %y) {
; SSE-LABEL: combine_vec_fcopysign_fneg_fabs_sgn:
; SSE: # BB#0:
-; SSE-NEXT: movaps {{.*#+}} xmm2 = [-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00]
-; SSE-NEXT: orps %xmm2, %xmm1
-; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andps {{.*}}(%rip), %xmm0
-; SSE-NEXT: orps %xmm1, %xmm0
+; SSE-NEXT: orps {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: combine_vec_fcopysign_fneg_fabs_sgn:
; AVX: # BB#0:
+; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
-; AVX-NEXT: vorps %xmm2, %xmm1, %xmm1
-; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm3
-; AVX-NEXT: vandps %xmm3, %xmm0, %xmm0
-; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1
+; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0
; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %y)
Modified: llvm/trunk/test/CodeGen/X86/machine-cp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-cp.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-cp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-cp.ll Sat Oct 28 07:27:53 2017
@@ -99,100 +99,85 @@ while.end:
define <16 x float> @foo(<16 x float> %x) {
; CHECK-LABEL: foo:
; CHECK: ## BB#0: ## %bb
-; CHECK-NEXT: xorps %xmm4, %xmm4
+; CHECK-NEXT: movaps %xmm3, %xmm8
+; CHECK-NEXT: xorps %xmm3, %xmm3
; CHECK-NEXT: pxor %xmm6, %xmm6
; CHECK-NEXT: pcmpgtd %xmm0, %xmm6
; CHECK-NEXT: movdqa {{.*#+}} xmm5 = [255,255,255,255]
; CHECK-NEXT: pand %xmm6, %xmm5
+; CHECK-NEXT: packuswb %xmm5, %xmm5
+; CHECK-NEXT: packuswb %xmm5, %xmm5
; CHECK-NEXT: cvttps2dq %xmm0, %xmm13
; CHECK-NEXT: movdqa %xmm0, %xmm10
-; CHECK-NEXT: cmpltps %xmm4, %xmm10
-; CHECK-NEXT: movdqa %xmm6, %xmm8
-; CHECK-NEXT: pxor %xmm10, %xmm8
+; CHECK-NEXT: cmpltps %xmm3, %xmm10
+; CHECK-NEXT: movdqa %xmm6, %xmm9
+; CHECK-NEXT: pxor %xmm10, %xmm9
; CHECK-NEXT: cvttps2dq %xmm1, %xmm14
; CHECK-NEXT: movaps %xmm1, %xmm11
-; CHECK-NEXT: cmpltps %xmm4, %xmm11
-; CHECK-NEXT: movdqa %xmm6, %xmm9
-; CHECK-NEXT: pxor %xmm11, %xmm9
-; CHECK-NEXT: cvttps2dq %xmm2, %xmm1
-; CHECK-NEXT: cmpltps %xmm4, %xmm2
+; CHECK-NEXT: cmpltps %xmm3, %xmm11
; CHECK-NEXT: movdqa %xmm6, %xmm7
-; CHECK-NEXT: pxor %xmm2, %xmm7
-; CHECK-NEXT: cvttps2dq %xmm3, %xmm12
-; CHECK-NEXT: cmpltps %xmm4, %xmm3
-; CHECK-NEXT: pxor %xmm3, %xmm6
+; CHECK-NEXT: pxor %xmm11, %xmm7
+; CHECK-NEXT: cvttps2dq %xmm2, %xmm1
+; CHECK-NEXT: cmpltps %xmm3, %xmm2
+; CHECK-NEXT: movdqa %xmm6, %xmm4
+; CHECK-NEXT: pxor %xmm2, %xmm4
+; CHECK-NEXT: cvttps2dq %xmm8, %xmm12
+; CHECK-NEXT: cmpltps %xmm3, %xmm8
+; CHECK-NEXT: pxor %xmm8, %xmm6
; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
; CHECK-NEXT: pand %xmm0, %xmm6
+; CHECK-NEXT: pand %xmm0, %xmm4
; CHECK-NEXT: pand %xmm0, %xmm7
; CHECK-NEXT: pand %xmm0, %xmm9
-; CHECK-NEXT: pand %xmm0, %xmm8
; CHECK-NEXT: cvtdq2ps %xmm13, %xmm15
; CHECK-NEXT: cvtdq2ps %xmm14, %xmm14
; CHECK-NEXT: cvtdq2ps %xmm1, %xmm13
; CHECK-NEXT: cvtdq2ps %xmm12, %xmm12
; CHECK-NEXT: pxor %xmm0, %xmm0
; CHECK-NEXT: cmpltps %xmm12, %xmm0
-; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
-; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; CHECK-NEXT: xorps %xmm1, %xmm1
; CHECK-NEXT: cmpltps %xmm13, %xmm1
-; CHECK-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
-; CHECK-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
-; CHECK-NEXT: pxor %xmm0, %xmm0
+; CHECK-NEXT: packssdw %xmm0, %xmm1
+; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cmpltps %xmm14, %xmm0
-; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
-; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; CHECK-NEXT: cmpltps %xmm15, %xmm4
-; CHECK-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
-; CHECK-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7]
-; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm0[0]
-; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,255]
-; CHECK-NEXT: pand %xmm0, %xmm1
-; CHECK-NEXT: pand %xmm0, %xmm4
-; CHECK-NEXT: packuswb %xmm5, %xmm5
-; CHECK-NEXT: packuswb %xmm5, %xmm5
-; CHECK-NEXT: packuswb %xmm1, %xmm4
-; CHECK-NEXT: pand %xmm5, %xmm4
-; CHECK-NEXT: movdqa %xmm4, %xmm1
+; CHECK-NEXT: cmpltps %xmm15, %xmm3
+; CHECK-NEXT: packssdw %xmm0, %xmm3
+; CHECK-NEXT: packsswb %xmm1, %xmm3
+; CHECK-NEXT: pand %xmm5, %xmm3
+; CHECK-NEXT: movdqa %xmm3, %xmm1
; CHECK-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; CHECK-NEXT: movdqa %xmm1, %xmm0
; CHECK-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
; CHECK-NEXT: pslld $31, %xmm0
; CHECK-NEXT: psrad $31, %xmm0
-; CHECK-NEXT: pxor %xmm8, %xmm0
-; CHECK-NEXT: pxor %xmm15, %xmm0
; CHECK-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; CHECK-NEXT: pslld $31, %xmm1
; CHECK-NEXT: psrad $31, %xmm1
-; CHECK-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm0[8],xmm4[9],xmm0[9],xmm4[10],xmm0[10],xmm4[11],xmm0[11],xmm4[12],xmm0[12],xmm4[13],xmm0[13],xmm4[14],xmm0[14],xmm4[15],xmm0[15]
-; CHECK-NEXT: pxor %xmm9, %xmm1
-; CHECK-NEXT: pxor %xmm14, %xmm1
-; CHECK-NEXT: movdqa %xmm4, %xmm5
+; CHECK-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm0[8],xmm3[9],xmm0[9],xmm3[10],xmm0[10],xmm3[11],xmm0[11],xmm3[12],xmm0[12],xmm3[13],xmm0[13],xmm3[14],xmm0[14],xmm3[15],xmm0[15]
+; CHECK-NEXT: movdqa %xmm3, %xmm5
; CHECK-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3]
; CHECK-NEXT: pslld $31, %xmm5
; CHECK-NEXT: psrad $31, %xmm5
-; CHECK-NEXT: pxor %xmm7, %xmm5
+; CHECK-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
+; CHECK-NEXT: pslld $31, %xmm3
+; CHECK-NEXT: psrad $31, %xmm3
+; CHECK-NEXT: pxor %xmm9, %xmm0
+; CHECK-NEXT: pxor %xmm15, %xmm0
+; CHECK-NEXT: pxor %xmm7, %xmm1
+; CHECK-NEXT: pxor %xmm14, %xmm1
+; CHECK-NEXT: pxor %xmm4, %xmm5
; CHECK-NEXT: pxor %xmm13, %xmm5
-; CHECK-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7]
-; CHECK-NEXT: pslld $31, %xmm4
-; CHECK-NEXT: psrad $31, %xmm4
-; CHECK-NEXT: pxor %xmm6, %xmm4
-; CHECK-NEXT: pxor %xmm12, %xmm4
-; CHECK-NEXT: pand %xmm3, %xmm4
+; CHECK-NEXT: pxor %xmm6, %xmm3
+; CHECK-NEXT: pxor %xmm12, %xmm3
+; CHECK-NEXT: pand %xmm8, %xmm3
; CHECK-NEXT: pand %xmm2, %xmm5
; CHECK-NEXT: pand %xmm11, %xmm1
; CHECK-NEXT: pand %xmm10, %xmm0
-; CHECK-NEXT: pxor %xmm8, %xmm0
-; CHECK-NEXT: pxor %xmm9, %xmm1
-; CHECK-NEXT: pxor %xmm7, %xmm5
-; CHECK-NEXT: pxor %xmm6, %xmm4
+; CHECK-NEXT: pxor %xmm9, %xmm0
+; CHECK-NEXT: pxor %xmm7, %xmm1
+; CHECK-NEXT: pxor %xmm4, %xmm5
+; CHECK-NEXT: pxor %xmm6, %xmm3
; CHECK-NEXT: movdqa %xmm5, %xmm2
-; CHECK-NEXT: movdqa %xmm4, %xmm3
; CHECK-NEXT: retq
bb:
%v3 = icmp slt <16 x i32> undef, zeroinitializer
Modified: llvm/trunk/test/CodeGen/X86/vector-compare-results.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-compare-results.ll?rev=316831&r1=316830&r2=316831&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-compare-results.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-compare-results.ll Sat Oct 28 07:27:53 2017
@@ -2190,58 +2190,29 @@ define <16 x i1> @test_cmp_v16f64(<16 x
define <32 x i1> @test_cmp_v32f32(<32 x float> %a0, <32 x float> %a1) nounwind {
; SSE2-LABEL: test_cmp_v32f32:
; SSE2: # BB#0:
-; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm8
; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm9
-; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm10
; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm11
+; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm10
; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm12
+; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm8
; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm13
; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm14
; SSE2-NEXT: movaps {{[0-9]+}}(%rsp), %xmm15
; SSE2-NEXT: cmpltps %xmm3, %xmm15
-; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm15[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-NEXT: cmpltps %xmm2, %xmm14
-; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm14[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
-; SSE2-NEXT: pand %xmm3, %xmm2
+; SSE2-NEXT: packssdw %xmm15, %xmm14
; SSE2-NEXT: cmpltps %xmm1, %xmm13
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm13[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; SSE2-NEXT: cmpltps %xmm0, %xmm12
-; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm12[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE2-NEXT: pand %xmm3, %xmm0
-; SSE2-NEXT: packuswb %xmm2, %xmm0
-; SSE2-NEXT: cmpltps %xmm7, %xmm11
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm11[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: cmpltps %xmm0, %xmm8
+; SSE2-NEXT: packssdw %xmm13, %xmm8
+; SSE2-NEXT: packsswb %xmm14, %xmm8
+; SSE2-NEXT: cmpltps %xmm7, %xmm12
; SSE2-NEXT: cmpltps %xmm6, %xmm10
-; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm10[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
-; SSE2-NEXT: pand %xmm3, %xmm2
-; SSE2-NEXT: cmpltps %xmm5, %xmm9
-; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm9[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; SSE2-NEXT: cmpltps %xmm4, %xmm8
-; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm8[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7]
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm1[0]
-; SSE2-NEXT: pand %xmm3, %xmm4
-; SSE2-NEXT: packuswb %xmm2, %xmm4
-; SSE2-NEXT: movdqa %xmm4, -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: packssdw %xmm12, %xmm10
+; SSE2-NEXT: cmpltps %xmm5, %xmm11
+; SSE2-NEXT: cmpltps %xmm4, %xmm9
+; SSE2-NEXT: packssdw %xmm11, %xmm9
+; SSE2-NEXT: packsswb %xmm10, %xmm9
+; SSE2-NEXT: movdqa %xmm9, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-NEXT: andb $1, %al
; SSE2-NEXT: movb %al, 2(%rdi)
@@ -2290,7 +2261,7 @@ define <32 x i1> @test_cmp_v32f32(<32 x
; SSE2-NEXT: movb %cl, 2(%rdi)
; SSE2-NEXT: andb $1, %al
; SSE2-NEXT: movb %al, 2(%rdi)
-; SSE2-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movdqa %xmm8, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-NEXT: andb $1, %al
; SSE2-NEXT: movb %al, (%rdi)
@@ -7886,75 +7857,70 @@ define <32 x i1> @test_cmp_v32f64(<32 x
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
; SSE2-NEXT: cmpltpd %xmm6, %xmm7
; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm6 = xmm4[0,1,0,2,4,5,6,7]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,1,0,2,4,5,6,7]
; SSE2-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm7[0,1,0,2,4,5,6,7]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1]
-; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm5[0],xmm4[1]
-; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm5
-; SSE2-NEXT: cmpltpd %xmm1, %xmm5
-; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm6
-; SSE2-NEXT: cmpltpd %xmm0, %xmm6
+; SSE2-NEXT: pshuflw {{.*#+}} xmm6 = xmm7[0,1,0,2,4,5,6,7]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: movsd {{.*#+}} xmm6 = xmm5[0],xmm6[1]
+; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE2-NEXT: cmpltpd %xmm1, %xmm4
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm1
-; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm5[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm5 = xmm6[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
+; SSE2-NEXT: cmpltpd %xmm0, %xmm1
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm4[0,2,2,3,4,5,6,7]
+; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,2,2,3,4,5,6,7]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm0
; SSE2-NEXT: cmpltpd %xmm3, %xmm0
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
; SSE2-NEXT: cmpltpd %xmm2, %xmm3
-; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm6
+; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm1
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm3[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
+; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm2
+; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
-; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm5[0],xmm0[1]
-; SSE2-NEXT: movapd {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
-; SSE2-NEXT: andpd %xmm2, %xmm4
-; SSE2-NEXT: andpd %xmm2, %xmm0
-; SSE2-NEXT: packuswb %xmm4, %xmm0
+; SSE2-NEXT: packsswb %xmm6, %xmm0
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm4
; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm3
; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm5 = xmm3[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
+; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm4
+; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,1,0,2,4,5,6,7]
+; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm2
+; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,2,3]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
+; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm3
; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[0,1,0,2,4,5,6,7]
-; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm6
-; SSE2-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm6[0,1,0,2,4,5,6,7]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
-; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
-; SSE2-NEXT: movsd {{.*#+}} xmm3 = xmm5[0],xmm3[1]
-; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm5
-; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm5
-; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,2,2,3,4,5,6,7]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7]
; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm4
; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
-; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm5
-; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm5
-; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,2,2,3]
-; SSE2-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,1,0,2,4,5,6,7]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
+; SSE2-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
+; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm3
+; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
; SSE2-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm1
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm4[0],xmm1[1]
-; SSE2-NEXT: andpd %xmm2, %xmm3
-; SSE2-NEXT: andpd %xmm2, %xmm1
-; SSE2-NEXT: packuswb %xmm3, %xmm1
+; SSE2-NEXT: packsswb %xmm2, %xmm1
; SSE2-NEXT: movdqa %xmm1, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-NEXT: andb $1, %al
@@ -8065,137 +8031,179 @@ define <32 x i1> @test_cmp_v32f64(<32 x
; SSE42-NEXT: pushq %r12
; SSE42-NEXT: pushq %rbx
; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm8
-; SSE42-NEXT: cmpltpd %xmm0, %xmm8
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm0
-; SSE42-NEXT: cmpltpd %xmm1, %xmm0
+; SSE42-NEXT: cmpltpd %xmm7, %xmm8
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
+; SSE42-NEXT: cmpltpd %xmm6, %xmm7
+; SSE42-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm6 = xmm8[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm7 = xmm7[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm6
+; SSE42-NEXT: cmpltpd %xmm5, %xmm6
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm5
+; SSE42-NEXT: cmpltpd %xmm4, %xmm5
+; SSE42-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm4 = xmm6[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE42-NEXT: pblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm7[4,5,6,7]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: cmpltpd %xmm3, %xmm4
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
+; SSE42-NEXT: cmpltpd %xmm2, %xmm3
+; SSE42-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm2
+; SSE42-NEXT: cmpltpd %xmm1, %xmm2
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: cmpltpd %xmm0, %xmm4
; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm1
-; SSE42-NEXT: cmpltpd %xmm2, %xmm1
+; SSE42-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm4[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm2
-; SSE42-NEXT: cmpltpd %xmm3, %xmm2
+; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7]
; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
-; SSE42-NEXT: cmpltpd %xmm4, %xmm3
+; SSE42-NEXT: packsswb %xmm5, %xmm0
; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
-; SSE42-NEXT: cmpltpd %xmm5, %xmm4
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm5
-; SSE42-NEXT: cmpltpd %xmm6, %xmm5
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm6
-; SSE42-NEXT: cmpltpd %xmm7, %xmm6
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %r8d
-; SSE42-NEXT: pextrb $0, %xmm7, %r13d
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %r14d
-; SSE42-NEXT: pextrb $0, %xmm7, %ebx
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %r15d
-; SSE42-NEXT: pextrb $0, %xmm7, %ebp
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %r12d
-; SSE42-NEXT: pextrb $0, %xmm7, %ecx
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %r11d
-; SSE42-NEXT: pextrb $0, %xmm7, %edx
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %r9d
-; SSE42-NEXT: pextrb $0, %xmm7, %esi
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: pextrb $8, %xmm7, %eax
-; SSE42-NEXT: movl %eax, -{{[0-9]+}}(%rsp) # 4-byte Spill
-; SSE42-NEXT: pextrb $0, %xmm7, %r10d
-; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm7
-; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm7
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm3
+; SSE42-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm2
+; SSE42-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm3[4,5,6,7]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm3
+; SSE42-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm4
+; SSE42-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,1,0,2,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
+; SSE42-NEXT: movapd {{[0-9]+}}(%rsp), %xmm3
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm3
+; SSE42-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm1
+; SSE42-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE42-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
+; SSE42-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
+; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm4[4,5,6,7]
+; SSE42-NEXT: packsswb %xmm2, %xmm1
+; SSE42-NEXT: pextrb $15, %xmm1, %eax
+; SSE42-NEXT: andb $1, %al
+; SSE42-NEXT: movb %al, 2(%rdi)
+; SSE42-NEXT: pextrb $14, %xmm1, %eax
+; SSE42-NEXT: andb $1, %al
+; SSE42-NEXT: movb %al, 2(%rdi)
+; SSE42-NEXT: pextrb $13, %xmm1, %r8d
+; SSE42-NEXT: pextrb $12, %xmm1, %r9d
+; SSE42-NEXT: pextrb $11, %xmm1, %r10d
+; SSE42-NEXT: pextrb $10, %xmm1, %r11d
+; SSE42-NEXT: pextrb $9, %xmm1, %r14d
+; SSE42-NEXT: pextrb $8, %xmm1, %r15d
+; SSE42-NEXT: pextrb $7, %xmm1, %r12d
+; SSE42-NEXT: pextrb $6, %xmm1, %r13d
+; SSE42-NEXT: pextrb $5, %xmm1, %ebx
+; SSE42-NEXT: pextrb $4, %xmm1, %ebp
+; SSE42-NEXT: pextrb $3, %xmm1, %eax
+; SSE42-NEXT: pextrb $2, %xmm1, %ecx
+; SSE42-NEXT: pextrb $1, %xmm1, %edx
+; SSE42-NEXT: pextrb $0, %xmm1, %esi
; SSE42-NEXT: andb $1, %r8b
; SSE42-NEXT: movb %r8b, 2(%rdi)
-; SSE42-NEXT: andb $1, %r13b
-; SSE42-NEXT: movb %r13b, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm7, %eax
-; SSE42-NEXT: movl %eax, -{{[0-9]+}}(%rsp) # 4-byte Spill
-; SSE42-NEXT: pextrb $0, %xmm7, %r13d
+; SSE42-NEXT: andb $1, %r9b
+; SSE42-NEXT: movb %r9b, 2(%rdi)
+; SSE42-NEXT: andb $1, %r10b
+; SSE42-NEXT: movb %r10b, 2(%rdi)
+; SSE42-NEXT: andb $1, %r11b
+; SSE42-NEXT: movb %r11b, 2(%rdi)
; SSE42-NEXT: andb $1, %r14b
; SSE42-NEXT: movb %r14b, 2(%rdi)
-; SSE42-NEXT: andb $1, %bl
-; SSE42-NEXT: movb %bl, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm6, %r14d
-; SSE42-NEXT: pextrb $0, %xmm6, %r8d
; SSE42-NEXT: andb $1, %r15b
; SSE42-NEXT: movb %r15b, 2(%rdi)
-; SSE42-NEXT: andb $1, %bpl
-; SSE42-NEXT: movb %bpl, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm5, %r15d
-; SSE42-NEXT: pextrb $0, %xmm5, %ebp
; SSE42-NEXT: andb $1, %r12b
; SSE42-NEXT: movb %r12b, 2(%rdi)
+; SSE42-NEXT: andb $1, %r13b
+; SSE42-NEXT: movb %r13b, 2(%rdi)
+; SSE42-NEXT: andb $1, %bl
+; SSE42-NEXT: movb %bl, 2(%rdi)
+; SSE42-NEXT: andb $1, %bpl
+; SSE42-NEXT: movb %bpl, 2(%rdi)
+; SSE42-NEXT: andb $1, %al
+; SSE42-NEXT: movb %al, 2(%rdi)
; SSE42-NEXT: andb $1, %cl
; SSE42-NEXT: movb %cl, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm4, %r12d
-; SSE42-NEXT: pextrb $0, %xmm4, %ebx
-; SSE42-NEXT: andb $1, %r11b
-; SSE42-NEXT: movb %r11b, 2(%rdi)
; SSE42-NEXT: andb $1, %dl
; SSE42-NEXT: movb %dl, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm3, %r11d
-; SSE42-NEXT: pextrb $0, %xmm3, %ecx
-; SSE42-NEXT: andb $1, %r9b
-; SSE42-NEXT: movb %r9b, 2(%rdi)
; SSE42-NEXT: andb $1, %sil
; SSE42-NEXT: movb %sil, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm2, %r9d
-; SSE42-NEXT: pextrb $0, %xmm2, %edx
-; SSE42-NEXT: movl -{{[0-9]+}}(%rsp), %eax # 4-byte Reload
+; SSE42-NEXT: pextrb $15, %xmm0, %eax
; SSE42-NEXT: andb $1, %al
-; SSE42-NEXT: movb %al, 2(%rdi)
-; SSE42-NEXT: andb $1, %r10b
-; SSE42-NEXT: movb %r10b, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm1, %r10d
-; SSE42-NEXT: pextrb $0, %xmm1, %esi
-; SSE42-NEXT: movl -{{[0-9]+}}(%rsp), %eax # 4-byte Reload
+; SSE42-NEXT: movb %al, (%rdi)
+; SSE42-NEXT: pextrb $14, %xmm0, %eax
; SSE42-NEXT: andb $1, %al
-; SSE42-NEXT: movb %al, 2(%rdi)
-; SSE42-NEXT: andb $1, %r13b
-; SSE42-NEXT: movb %r13b, 2(%rdi)
-; SSE42-NEXT: pextrb $8, %xmm0, %r13d
-; SSE42-NEXT: pextrb $0, %xmm0, %eax
-; SSE42-NEXT: andb $1, %r14b
-; SSE42-NEXT: movb %r14b, (%rdi)
+; SSE42-NEXT: movb %al, (%rdi)
+; SSE42-NEXT: pextrb $13, %xmm0, %r8d
+; SSE42-NEXT: pextrb $12, %xmm0, %r9d
+; SSE42-NEXT: pextrb $11, %xmm0, %r10d
+; SSE42-NEXT: pextrb $10, %xmm0, %r11d
+; SSE42-NEXT: pextrb $9, %xmm0, %r14d
+; SSE42-NEXT: pextrb $8, %xmm0, %r15d
+; SSE42-NEXT: pextrb $7, %xmm0, %r12d
+; SSE42-NEXT: pextrb $6, %xmm0, %r13d
+; SSE42-NEXT: pextrb $5, %xmm0, %ebx
+; SSE42-NEXT: pextrb $4, %xmm0, %ebp
+; SSE42-NEXT: pextrb $3, %xmm0, %eax
+; SSE42-NEXT: pextrb $2, %xmm0, %ecx
+; SSE42-NEXT: pextrb $1, %xmm0, %edx
+; SSE42-NEXT: pextrb $0, %xmm0, %esi
; SSE42-NEXT: andb $1, %r8b
; SSE42-NEXT: movb %r8b, (%rdi)
-; SSE42-NEXT: pextrb $8, %xmm8, %r8d
-; SSE42-NEXT: pextrb $0, %xmm8, %r14d
+; SSE42-NEXT: andb $1, %r9b
+; SSE42-NEXT: movb %r9b, (%rdi)
+; SSE42-NEXT: andb $1, %r10b
+; SSE42-NEXT: movb %r10b, (%rdi)
+; SSE42-NEXT: andb $1, %r11b
+; SSE42-NEXT: movb %r11b, (%rdi)
+; SSE42-NEXT: andb $1, %r14b
+; SSE42-NEXT: movb %r14b, (%rdi)
; SSE42-NEXT: andb $1, %r15b
; SSE42-NEXT: movb %r15b, (%rdi)
-; SSE42-NEXT: andb $1, %bpl
-; SSE42-NEXT: movb %bpl, (%rdi)
; SSE42-NEXT: andb $1, %r12b
; SSE42-NEXT: movb %r12b, (%rdi)
+; SSE42-NEXT: andb $1, %r13b
+; SSE42-NEXT: movb %r13b, (%rdi)
; SSE42-NEXT: andb $1, %bl
; SSE42-NEXT: movb %bl, (%rdi)
-; SSE42-NEXT: andb $1, %r11b
-; SSE42-NEXT: movb %r11b, (%rdi)
+; SSE42-NEXT: andb $1, %bpl
+; SSE42-NEXT: movb %bpl, (%rdi)
+; SSE42-NEXT: andb $1, %al
+; SSE42-NEXT: movb %al, (%rdi)
; SSE42-NEXT: andb $1, %cl
; SSE42-NEXT: movb %cl, (%rdi)
-; SSE42-NEXT: andb $1, %r9b
-; SSE42-NEXT: movb %r9b, (%rdi)
; SSE42-NEXT: andb $1, %dl
; SSE42-NEXT: movb %dl, (%rdi)
-; SSE42-NEXT: andb $1, %r10b
-; SSE42-NEXT: movb %r10b, (%rdi)
; SSE42-NEXT: andb $1, %sil
; SSE42-NEXT: movb %sil, (%rdi)
-; SSE42-NEXT: andb $1, %r13b
-; SSE42-NEXT: movb %r13b, (%rdi)
-; SSE42-NEXT: andb $1, %al
-; SSE42-NEXT: movb %al, (%rdi)
-; SSE42-NEXT: andb $1, %r8b
-; SSE42-NEXT: movb %r8b, (%rdi)
-; SSE42-NEXT: andb $1, %r14b
-; SSE42-NEXT: movb %r14b, (%rdi)
; SSE42-NEXT: movq %rdi, %rax
; SSE42-NEXT: popq %rbx
; SSE42-NEXT: popq %r12
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