[PATCH] D39292: [X86][AVX512] Adding new patterns for extract_subvector of vXi1

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

We shouldn’t rely on pattern order in the td file if we can avoid it. So a pattern that is for when DQI is disabled should have a no DQI predicate.

But in this case I see no good reason to have two different patterns. Why can’t we use KSHIFTW even when DQI is enabled? Is there a downside?



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Comment at: lib/Target/X86/X86InstrAVX512.td:2967
+defm : vextract_for_mask_to_mask<"KSHIFTRQ", v64i1_info, v1i1_info, HasBWI>;
+defm : vextract_for_mask_to_mask<"KSHIFTRB", v8i1_info, v2i1_info,  HasDQI>;
+defm : vextract_for_mask_to_mask<"KSHIFTRW", v16i1_info, v2i1_info, HasAVX512>;
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Are we missing a VK8->VK2 pattern without DQI?


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Comment at: test/CodeGen/X86/avx512-extract-subvector-load-store.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -O2 | FileCheck %s --check-prefix=AVX512
+
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Add a command line without DQI as well?


https://reviews.llvm.org/D39292