[PATCH] D38196: [AArch64] Avoid interleaved SIMD store instructions for Exynos

[Javed Absar via Phabricator via llvm-commits]

javed.absar added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp:189
   }
+  for (unsigned i=0; i<InstDescRepl.size(); i++)
+  {
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nitpick. Please replace with range_loop (unless there is a strong reason not to)


https://reviews.llvm.org/D38196