[llvm] r316586 - AMDGPU/NFC: Rename memory legalizer tests:
Konstantin Zhuravlyov via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 25 09:45:28 PDT 2017
Author: kzhuravl
Date: Wed Oct 25 09:45:28 2017
New Revision: 316586
URL: http://llvm.org/viewvc/llvm-project?rev=316586&view=rev
Log:
AMDGPU/NFC: Rename memory legalizer tests:
- memory-legalizer-atomic-load.ll -> memory-legalizer-load.ll
- memory-legalizer-atomic-store.ll -> memory-legalizer-store.ll
Added:
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-load.ll
- copied unchanged from r316585, llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-load.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-store.ll
- copied unchanged from r316585, llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-store.ll
Removed:
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-load.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-store.ll
Removed: llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-load.ll?rev=316585&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-load.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-load.ll (removed)
@@ -1,282 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd- -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck %s
-
-; CHECK-LABEL: {{^}}system_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @system_unordered(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in unordered, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}system_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @system_monotonic(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in monotonic, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}system_acquire
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
-; CHECK-NEXT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @system_acquire(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in acquire, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}system_seq_cst
-; CHECK: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
-; CHECK-NEXT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @system_seq_cst(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in seq_cst, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @singlethread_unordered(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("singlethread") unordered, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @singlethread_monotonic(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("singlethread") monotonic, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_acquire
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @singlethread_acquire(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("singlethread") acquire, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_seq_cst
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @singlethread_seq_cst(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("singlethread") seq_cst, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @agent_unordered(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("agent") unordered, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @agent_monotonic(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("agent") monotonic, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_acquire
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
-; CHECK-NEXT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @agent_acquire(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("agent") acquire, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_seq_cst
-; CHECK: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
-; CHECK-NEXT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @agent_seq_cst(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("agent") seq_cst, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @workgroup_unordered(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("workgroup") unordered, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @workgroup_monotonic(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("workgroup") monotonic, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_acquire
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @workgroup_acquire(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("workgroup") acquire, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_seq_cst
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @workgroup_seq_cst(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("workgroup") seq_cst, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @wavefront_unordered(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("wavefront") unordered, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @wavefront_monotonic(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("wavefront") monotonic, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_acquire
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @wavefront_acquire(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("wavefront") acquire, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_seq_cst
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK-NOT: buffer_wbinvl1_vol
-; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
-define amdgpu_kernel void @wavefront_seq_cst(
- i32 addrspace(4)* %in, i32 addrspace(4)* %out) {
-entry:
- %val = load atomic i32, i32 addrspace(4)* %in syncscope("wavefront") seq_cst, align 4
- store i32 %val, i32 addrspace(4)* %out
- ret void
-}
Removed: llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-store.ll?rev=316585&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-store.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-store.ll (removed)
@@ -1,202 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd- -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck %s
-
-; CHECK-LABEL: {{^}}system_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @system_unordered(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out unordered, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}system_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @system_monotonic(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out monotonic, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}system_release
-; CHECK: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @system_release(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out release, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}system_seq_cst
-; CHECK: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @system_seq_cst(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out seq_cst, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @singlethread_unordered(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") unordered, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @singlethread_monotonic(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") monotonic, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_release
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @singlethread_release(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") release, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}singlethread_seq_cst
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @singlethread_seq_cst(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") seq_cst, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @agent_unordered(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") unordered, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @agent_monotonic(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") monotonic, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_release
-; CHECK: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @agent_release(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") release, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}agent_seq_cst
-; CHECK: s_waitcnt vmcnt(0){{$}}
-; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @agent_seq_cst(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") seq_cst, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @workgroup_unordered(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") unordered, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @workgroup_monotonic(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") monotonic, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_release
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @workgroup_release(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") release, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}workgroup_seq_cst
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @workgroup_seq_cst(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") seq_cst, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_unordered
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @wavefront_unordered(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") unordered, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_monotonic
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @wavefront_monotonic(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") monotonic, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_release
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @wavefront_release(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") release, align 4
- ret void
-}
-
-; CHECK-LABEL: {{^}}wavefront_seq_cst
-; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
-; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
-define amdgpu_kernel void @wavefront_seq_cst(
- i32 %in, i32 addrspace(4)* %out) {
-entry:
- store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") seq_cst, align 4
- ret void
-}
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