[llvm] r316367 - [Hexagon] Return the correct chain edge for i1 function calls

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 23 12:35:25 PDT 2017


Author: kparzysz
Date: Mon Oct 23 12:35:25 2017
New Revision: 316367

URL: http://llvm.org/viewvc/llvm-project?rev=316367&view=rev
Log:
[Hexagon] Return the correct chain edge for i1 function calls

In HexagonISelLowering, there is code to handle the case when
a function returns an i1 type. In this case, we need to generate
extra nodes to copy the result from R0 to a predicate register.

The code was returning the wrong value for the chain edge which
caused an assert "Wrong topological sorting" when converting the
instructions to MIs.

This patch fixes the problem by returning the chain for the final
copy.

Patch by Brendon Cahoon.

Added:
    llvm/trunk/test/CodeGen/Hexagon/call-ret-i1.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=316367&r1=316366&r2=316367&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Mon Oct 23 12:35:25 2017
@@ -677,13 +677,14 @@ SDValue HexagonTargetLowering::LowerCall
       // as an implicit def to the call (EmitMachineNode).
       RetVal = DAG.getCopyFromReg(TPR.getValue(0), dl, PredR, MVT::i1);
       Glue = TPR.getValue(1);
+      Chain = TPR.getValue(0);
     } else {
       RetVal = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
                                   RVLocs[i].getValVT(), Glue);
       Glue = RetVal.getValue(2);
+      Chain = RetVal.getValue(1);
     }
     InVals.push_back(RetVal.getValue(0));
-    Chain = RetVal.getValue(1);
   }
 
   return Chain;

Added: llvm/trunk/test/CodeGen/Hexagon/call-ret-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/call-ret-i1.ll?rev=316367&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/call-ret-i1.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/call-ret-i1.ll Mon Oct 23 12:35:25 2017
@@ -0,0 +1,23 @@
+; RUN: llc -march=hexagon < %s
+; REQUIRES: asserts
+
+; Test that the compiler does not assert because the DAG is not correct.
+; CHECK: call foo
+
+%returntype = type { i1, i32 }
+
+define i32 @test(i32* %a0, i32* %a1, i32* %a2) #0 {
+b3:
+  br i1 undef, label %b6, label %b4
+
+b4:                                               ; preds = %b3
+  %v5 = call %returntype @foo(i32* nonnull undef, i32* %a2, i32* %a0) #0
+  ret i32 1
+
+b6:                                               ; preds = %b3
+  unreachable
+}
+
+declare %returntype @foo(i32*, i32*, i32*) #0
+
+attributes #0 = { nounwind }




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