[llvm] r316332 - [X86] Add RDPID instruction for assembler and disassembler.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Oct 23 08:53:16 2017
New Revision: 316332

URL: http://llvm.org/viewvc/llvm-project?rev=316332&view=rev
Log:
[X86] Add RDPID instruction for assembler and disassembler.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/test/MC/Disassembler/X86/simple-tests.txt
    llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
    llvm/trunk/test/MC/X86/x86-32.s
    llvm/trunk/test/MC/X86/x86-64.s

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=316332&r1=316331&r2=316332&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Oct 23 08:53:16 2017
@@ -2195,13 +2195,13 @@ let Predicates = [HasRDRAND], Defs = [EF
 let Predicates = [HasRDSEED], Defs = [EFLAGS] in {
   def RDSEED16r : I<0xC7, MRM7r, (outs GR16:$dst), (ins),
                     "rdseed{w}\t$dst",
-                    [(set GR16:$dst, EFLAGS, (X86rdseed))]>, OpSize16, TB;
+                    [(set GR16:$dst, EFLAGS, (X86rdseed))]>, OpSize16, PS;
   def RDSEED32r : I<0xC7, MRM7r, (outs GR32:$dst), (ins),
                     "rdseed{l}\t$dst",
-                    [(set GR32:$dst, EFLAGS, (X86rdseed))]>, OpSize32, TB;
+                    [(set GR32:$dst, EFLAGS, (X86rdseed))]>, OpSize32, PS;
   def RDSEED64r : RI<0xC7, MRM7r, (outs GR64:$dst), (ins),
                      "rdseed{q}\t$dst",
-                     [(set GR64:$dst, EFLAGS, (X86rdseed))]>, TB;
+                     [(set GR64:$dst, EFLAGS, (X86rdseed))]>, PS;
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=316332&r1=316331&r2=316332&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Mon Oct 23 08:53:16 2017
@@ -635,3 +635,12 @@ let Defs = [EFLAGS] in {
 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in {
   def GETSEC : I<0x37, RawFrm, (outs), (ins), "getsec", []>, TB;
 }
+
+//===----------------------------------------------------------------------===//
+// RDPID Instruction
+def RDPID32 : I<0xC7, MRM7r, (outs GR32:$src), (ins),
+              "rdpid\t$src", []>, XS,
+              Requires<[Not64BitMode]>;
+def RDPID64 : I<0xC7, MRM7r, (outs GR64:$src), (ins),
+              "rdpid\t$src", []>, XS,
+              Requires<[In64BitMode]>;

Modified: llvm/trunk/test/MC/Disassembler/X86/simple-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/simple-tests.txt?rev=316332&r1=316331&r2=316332&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/simple-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/simple-tests.txt Mon Oct 23 08:53:16 2017
@@ -964,3 +964,6 @@
 0x8f 0xe9 0x78 0x80 0x09
 # CHECK: vfrczps %ymm2, %ymm4
 0x8f 0xe9 0x7c 0x80 0xe2
+
+# CHECK: rdpid %rax
+0xf3 0x0f 0xc7 0xf8

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-32.txt?rev=316332&r1=316331&r2=316332&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-32.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-32.txt Mon Oct 23 08:53:16 2017
@@ -808,3 +808,6 @@
 0x2e 0x67 0x66 0x89 0x1c
 # CHECK: movw    %bx, %cs:(%si)
 0x2e 0x66 0x67 0x89 0x1c
+
+# CHECK: rdpid %eax
+0xf3 0x0f 0xc7 0xf8

Modified: llvm/trunk/test/MC/X86/x86-32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32.s?rev=316332&r1=316331&r2=316332&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32.s (original)
+++ llvm/trunk/test/MC/X86/x86-32.s Mon Oct 23 08:53:16 2017
@@ -1097,3 +1097,7 @@ data16
 // CHECK: lgdtl 4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x50,0x04]
 data16 lgdt 4(%eax)
+
+// CHECK: rdpid %eax
+// CHECK: encoding: [0xf3,0x0f,0xc7,0xf8]
+rdpid %eax

Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=316332&r1=316331&r2=316332&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Mon Oct 23 08:53:16 2017
@@ -1527,3 +1527,7 @@ nopq	0xdeadbeef(%rbx,%rcx,8)
 // CHECK: nopq	%rax
 // CHECK:  encoding: [0x48,0x0f,0x1f,0xc0]
 nopq	%rax
+
+// CHECK: rdpid %rax
+// CHECK: encoding: [0xf3,0x0f,0xc7,0xf8]
+rdpid %rax