[llvm] r316328 - [X86][SSE] Regenerate bitcast-and-setcc tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 23 07:47:49 PDT 2017
Author: rksimon
Date: Mon Oct 23 07:47:49 2017
New Revision: 316328
URL: http://llvm.org/viewvc/llvm-project?rev=316328&view=rev
Log:
[X86][SSE] Regenerate bitcast-and-setcc tests
Avoid the retl/retq changes in an upcoming patch
Modified:
llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll
llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll
llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll?rev=316328&r1=316327&r2=316328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll Mon Oct 23 07:47:49 2017
@@ -15,7 +15,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; SSE2-NEXT: packuswb %xmm2, %xmm2
; SSE2-NEXT: pmovmskb %xmm2, %eax
; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-NEXT: retq
+; SSE2-NEXT: ret{{[l|q]}}
;
; SSSE3-LABEL: v8i16:
; SSSE3: # BB#0:
@@ -25,7 +25,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; SSSE3-NEXT: pshufb {{.*#+}} xmm2 = xmm2[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; SSSE3-NEXT: pmovmskb %xmm2, %eax
; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSSE3-NEXT: retq
+; SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v8i16:
; AVX12: # BB#0:
@@ -35,7 +35,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX12-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v8i16:
; AVX512: # BB#0:
@@ -43,7 +43,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX512-NEXT: vpcmpgtw %xmm3, %xmm2, %k0 {%k1}
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <8 x i16> %a, %b
%x1 = icmp sgt <8 x i16> %c, %d
%y = and <8 x i1> %x0, %x1
@@ -59,7 +59,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; SSE2-SSSE3-NEXT: pand %xmm0, %xmm2
; SSE2-SSSE3-NEXT: movmskps %xmm2, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v4i32:
; AVX12: # BB#0:
@@ -68,7 +68,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v4i32:
; AVX512: # BB#0:
@@ -77,7 +77,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <4 x i32> %a, %b
%x1 = icmp sgt <4 x i32> %c, %d
%y = and <4 x i1> %x0, %x1
@@ -93,7 +93,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; SSE2-SSSE3-NEXT: andps %xmm1, %xmm3
; SSE2-SSSE3-NEXT: movmskps %xmm3, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v4f32:
; AVX12: # BB#0:
@@ -102,7 +102,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; AVX12-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v4f32:
; AVX512: # BB#0:
@@ -111,7 +111,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = fcmp ogt <4 x float> %a, %b
%x1 = fcmp ogt <4 x float> %c, %d
%y = and <4 x i1> %x0, %x1
@@ -127,7 +127,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; SSE2-SSSE3-NEXT: pand %xmm0, %xmm2
; SSE2-SSSE3-NEXT: pmovmskb %xmm2, %eax
; SSE2-SSSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v16i8:
; AVX12: # BB#0:
@@ -136,7 +136,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v16i8:
; AVX512: # BB#0:
@@ -144,7 +144,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; AVX512-NEXT: vpcmpgtb %xmm3, %xmm2, %k0 {%k1}
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <16 x i8> %a, %b
%x1 = icmp sgt <16 x i8> %c, %d
%y = and <16 x i1> %x0, %x1
@@ -207,7 +207,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; SSE2-SSSE3-NEXT: pand %xmm1, %xmm0
; SSE2-SSSE3-NEXT: movmskpd %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v2i8:
; AVX1: # BB#0:
@@ -236,7 +236,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vmovmskpd %xmm0, %eax
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v2i8:
; AVX2: # BB#0:
@@ -265,7 +265,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX2-NEXT: vmovmskpd %xmm0, %eax
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v2i8:
; AVX512: # BB#0:
@@ -282,7 +282,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <2 x i8> %a, %b
%x1 = icmp sgt <2 x i8> %c, %d
%y = and <2 x i1> %x0, %x1
@@ -345,7 +345,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; SSE2-SSSE3-NEXT: pand %xmm1, %xmm0
; SSE2-SSSE3-NEXT: movmskpd %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v2i16:
; AVX1: # BB#0:
@@ -374,7 +374,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vmovmskpd %xmm0, %eax
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v2i16:
; AVX2: # BB#0:
@@ -403,7 +403,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX2-NEXT: vmovmskpd %xmm0, %eax
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v2i16:
; AVX512: # BB#0:
@@ -420,7 +420,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <2 x i16> %a, %b
%x1 = icmp sgt <2 x i16> %c, %d
%y = and <2 x i1> %x0, %x1
@@ -475,7 +475,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; SSE2-SSSE3-NEXT: pand %xmm3, %xmm0
; SSE2-SSSE3-NEXT: movmskpd %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v2i32:
; AVX1: # BB#0:
@@ -500,7 +500,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vmovmskpd %xmm0, %eax
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v2i32:
; AVX2: # BB#0:
@@ -525,7 +525,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX2-NEXT: vmovmskpd %xmm0, %eax
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v2i32:
; AVX512: # BB#0:
@@ -542,7 +542,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <2 x i32> %a, %b
%x1 = icmp sgt <2 x i32> %c, %d
%y = and <2 x i1> %x0, %x1
@@ -577,7 +577,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; SSE2-SSSE3-NEXT: pand %xmm1, %xmm0
; SSE2-SSSE3-NEXT: movmskpd %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v2i64:
; AVX12: # BB#0:
@@ -586,7 +586,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vmovmskpd %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v2i64:
; AVX512: # BB#0:
@@ -595,7 +595,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <2 x i64> %a, %b
%x1 = icmp sgt <2 x i64> %c, %d
%y = and <2 x i1> %x0, %x1
@@ -611,7 +611,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; SSE2-SSSE3-NEXT: andpd %xmm1, %xmm3
; SSE2-SSSE3-NEXT: movmskpd %xmm3, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v2f64:
; AVX12: # BB#0:
@@ -620,7 +620,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; AVX12-NEXT: vandpd %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vmovmskpd %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v2f64:
; AVX512: # BB#0:
@@ -629,7 +629,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = fcmp ogt <2 x double> %a, %b
%x1 = fcmp ogt <2 x double> %c, %d
%y = and <2 x i1> %x0, %x1
@@ -653,7 +653,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; SSE2-SSSE3-NEXT: pand %xmm2, %xmm0
; SSE2-SSSE3-NEXT: movmskps %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v4i8:
; AVX12: # BB#0:
@@ -670,7 +670,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; AVX12-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v4i8:
; AVX512: # BB#0:
@@ -687,7 +687,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <4 x i8> %a, %b
%x1 = icmp sgt <4 x i8> %c, %d
%y = and <4 x i1> %x0, %x1
@@ -711,7 +711,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; SSE2-SSSE3-NEXT: pand %xmm2, %xmm0
; SSE2-SSSE3-NEXT: movmskps %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v4i16:
; AVX12: # BB#0:
@@ -728,7 +728,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; AVX12-NEXT: vpand %xmm2, %xmm0, %xmm0
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v4i16:
; AVX512: # BB#0:
@@ -745,7 +745,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <4 x i16> %a, %b
%x1 = icmp sgt <4 x i16> %c, %d
%y = and <4 x i1> %x0, %x1
@@ -771,7 +771,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; SSE2-NEXT: packuswb %xmm0, %xmm0
; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-NEXT: retq
+; SSE2-NEXT: ret{{[l|q]}}
;
; SSSE3-LABEL: v8i8:
; SSSE3: # BB#0:
@@ -789,7 +789,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSSE3-NEXT: retq
+; SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v8i8:
; AVX12: # BB#0:
@@ -807,7 +807,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; AVX12-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v8i8:
; AVX512: # BB#0:
@@ -823,7 +823,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; AVX512-NEXT: vpcmpgtw %xmm3, %xmm2, %k0 {%k1}
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <8 x i8> %a, %b
%x1 = icmp sgt <8 x i8> %c, %d
%y = and <8 x i1> %x0, %x1
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll?rev=316328&r1=316327&r2=316328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll Mon Oct 23 07:47:49 2017
@@ -54,7 +54,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; SSE2-SSSE3-NEXT: andps %xmm0, %xmm2
; SSE2-SSSE3-NEXT: movmskps %xmm2, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v4i64:
; AVX1: # BB#0:
@@ -72,7 +72,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX1-NEXT: vmovmskps %xmm0, %eax
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v4i64:
; AVX2: # BB#0:
@@ -86,7 +86,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX2-NEXT: vmovmskps %xmm0, %eax
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v4i64:
; AVX512: # BB#0:
@@ -96,7 +96,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <4 x i64> %a, %b
%x1 = icmp sgt <4 x i64> %c, %d
%y = and <4 x i1> %x0, %x1
@@ -116,7 +116,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; SSE2-SSSE3-NEXT: andps %xmm2, %xmm6
; SSE2-SSSE3-NEXT: movmskps %xmm6, %eax
; SSE2-SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v4f64:
; AVX12: # BB#0:
@@ -130,7 +130,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX12-NEXT: vzeroupper
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v4f64:
; AVX512: # BB#0:
@@ -140,7 +140,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movb -{{[0-9]+}}(%rsp), %al
; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = fcmp ogt <4 x double> %a, %b
%x1 = fcmp ogt <4 x double> %c, %d
%y = and <4 x i1> %x0, %x1
@@ -160,7 +160,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; SSE2-SSSE3-NEXT: pand %xmm0, %xmm4
; SSE2-SSSE3-NEXT: pmovmskb %xmm4, %eax
; SSE2-SSSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v16i16:
; AVX1: # BB#0:
@@ -178,7 +178,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v16i16:
; AVX2: # BB#0:
@@ -192,7 +192,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v16i16:
; AVX512: # BB#0:
@@ -201,7 +201,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <16 x i16> %a, %b
%x1 = icmp sgt <16 x i16> %c, %d
%y = and <16 x i1> %x0, %x1
@@ -223,7 +223,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; SSE2-NEXT: packuswb %xmm4, %xmm4
; SSE2-NEXT: pmovmskb %xmm4, %eax
; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-NEXT: retq
+; SSE2-NEXT: ret{{[l|q]}}
;
; SSSE3-LABEL: v8i32:
; SSSE3: # BB#0:
@@ -237,7 +237,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; SSSE3-NEXT: pshufb {{.*#+}} xmm4 = xmm4[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; SSSE3-NEXT: pmovmskb %xmm4, %eax
; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSSE3-NEXT: retq
+; SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v8i32:
; AVX1: # BB#0:
@@ -256,7 +256,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v8i32:
; AVX2: # BB#0:
@@ -271,7 +271,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v8i32:
; AVX512: # BB#0:
@@ -280,7 +280,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <8 x i32> %a, %b
%x1 = icmp sgt <8 x i32> %c, %d
%y = and <8 x i1> %x0, %x1
@@ -314,7 +314,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; SSE2-NEXT: packuswb %xmm2, %xmm2
; SSE2-NEXT: pmovmskb %xmm2, %eax
; SSE2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE2-NEXT: retq
+; SSE2-NEXT: ret{{[l|q]}}
;
; SSSE3-LABEL: v8f32:
; SSSE3: # BB#0:
@@ -333,7 +333,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; SSSE3-NEXT: pshufb {{.*#+}} xmm6 = xmm6[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; SSSE3-NEXT: pmovmskb %xmm6, %eax
; SSSE3-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSSE3-NEXT: retq
+; SSSE3-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v8f32:
; AVX12: # BB#0:
@@ -348,7 +348,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX12-NEXT: vzeroupper
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v8f32:
; AVX512: # BB#0:
@@ -357,7 +357,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = fcmp ogt <8 x float> %a, %b
%x1 = fcmp ogt <8 x float> %c, %d
%y = and <8 x i1> %x0, %x1
@@ -378,7 +378,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; SSE2-SSSE3-NEXT: pmovmskb %xmm5, %eax
; SSE2-SSSE3-NEXT: shll $16, %eax
; SSE2-SSSE3-NEXT: orl %ecx, %eax
-; SSE2-SSSE3-NEXT: retq
+; SSE2-SSSE3-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v32i8:
; AVX1: # BB#0:
@@ -397,7 +397,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX1-NEXT: shll $16, %eax
; AVX1-NEXT: orl %ecx, %eax
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v32i8:
; AVX2: # BB#0:
@@ -406,7 +406,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512-LABEL: v32i8:
; AVX512: # BB#0:
@@ -414,7 +414,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX512-NEXT: vpcmpgtb %ymm3, %ymm2, %k0 {%k1}
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
+; AVX512-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <32 x i8> %a, %b
%x1 = icmp sgt <32 x i8> %c, %d
%y = and <32 x i1> %x0, %x1
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll?rev=316328&r1=316327&r2=316328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll Mon Oct 23 07:47:49 2017
@@ -42,7 +42,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; SSE-NEXT: packsswb %xmm0, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v8i64:
; AVX1: # BB#0:
@@ -80,7 +80,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v8i64:
; AVX2: # BB#0:
@@ -110,7 +110,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: v8i64:
; AVX512F: # BB#0:
@@ -119,7 +119,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512F-NEXT: vzeroupper
-; AVX512F-NEXT: retq
+; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512BW-LABEL: v8i64:
; AVX512BW: # BB#0:
@@ -128,7 +128,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512BW-NEXT: vzeroupper
-; AVX512BW-NEXT: retq
+; AVX512BW-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <8 x i64> %a, %b
%x1 = icmp sgt <8 x i64> %c, %d
%y = and <8 x i1> %x0, %x1
@@ -174,7 +174,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; SSE-NEXT: packsswb %xmm0, %xmm2
; SSE-NEXT: pmovmskb %xmm2, %eax
; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v8f64:
; AVX12: # BB#0:
@@ -204,7 +204,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX12-NEXT: vzeroupper
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: v8f64:
; AVX512F: # BB#0:
@@ -213,7 +213,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512F-NEXT: vzeroupper
-; AVX512F-NEXT: retq
+; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512BW-LABEL: v8f64:
; AVX512BW: # BB#0:
@@ -222,7 +222,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512BW-NEXT: vzeroupper
-; AVX512BW-NEXT: retq
+; AVX512BW-NEXT: ret{{[l|q]}}
%x0 = fcmp ogt <8 x double> %a, %b
%x1 = fcmp ogt <8 x double> %c, %d
%y = and <8 x i1> %x0, %x1
@@ -255,7 +255,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: shll $16, %eax
; SSE-NEXT: orl %ecx, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v32i16:
; AVX1: # BB#0:
@@ -286,7 +286,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX1-NEXT: shll $16, %eax
; AVX1-NEXT: orl %ecx, %eax
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v32i16:
; AVX2: # BB#0:
@@ -307,7 +307,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: v32i16:
; AVX512F: # BB#0:
@@ -602,7 +602,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX512F-NEXT: movq %rbp, %rsp
; AVX512F-NEXT: popq %rbp
; AVX512F-NEXT: vzeroupper
-; AVX512F-NEXT: retq
+; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512BW-LABEL: v32i16:
; AVX512BW: # BB#0:
@@ -610,7 +610,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX512BW-NEXT: vpcmpgtw %zmm3, %zmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: vzeroupper
-; AVX512BW-NEXT: retq
+; AVX512BW-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <32 x i16> %a, %b
%x1 = icmp sgt <32 x i16> %c, %d
%y = and <32 x i1> %x0, %x1
@@ -642,7 +642,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; SSE-NEXT: pand %xmm0, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v16i32:
; AVX1: # BB#0:
@@ -677,7 +677,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v16i32:
; AVX2: # BB#0:
@@ -704,7 +704,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: v16i32:
; AVX512F: # BB#0:
@@ -713,7 +713,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512F-NEXT: vzeroupper
-; AVX512F-NEXT: retq
+; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512BW-LABEL: v16i32:
; AVX512BW: # BB#0:
@@ -722,7 +722,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512BW-NEXT: vzeroupper
-; AVX512BW-NEXT: retq
+; AVX512BW-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <16 x i32> %a, %b
%x1 = icmp sgt <16 x i32> %c, %d
%y = and <16 x i1> %x0, %x1
@@ -768,7 +768,7 @@ define i16 @v16f32(<16 x float> %a, <16
; SSE-NEXT: pand %xmm4, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX12-LABEL: v16f32:
; AVX12: # BB#0:
@@ -795,7 +795,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX12-NEXT: vzeroupper
-; AVX12-NEXT: retq
+; AVX12-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: v16f32:
; AVX512F: # BB#0:
@@ -804,7 +804,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512F-NEXT: vzeroupper
-; AVX512F-NEXT: retq
+; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512BW-LABEL: v16f32:
; AVX512BW: # BB#0:
@@ -813,7 +813,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512BW-NEXT: vzeroupper
-; AVX512BW-NEXT: retq
+; AVX512BW-NEXT: ret{{[l|q]}}
%x0 = fcmp ogt <16 x float> %a, %b
%x1 = fcmp ogt <16 x float> %c, %d
%y = and <16 x i1> %x0, %x1
@@ -1042,7 +1042,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; SSE-NEXT: orl %edx, %eax
; SSE-NEXT: shlq $32, %rax
; SSE-NEXT: orq %rcx, %rax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: v64i8:
; AVX1: # BB#0:
@@ -1276,7 +1276,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX1-NEXT: movq %rbp, %rsp
; AVX1-NEXT: popq %rbp
; AVX1-NEXT: vzeroupper
-; AVX1-NEXT: retq
+; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: v64i8:
; AVX2: # BB#0:
@@ -1494,7 +1494,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX2-NEXT: movq %rbp, %rsp
; AVX2-NEXT: popq %rbp
; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
+; AVX2-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: v64i8:
; AVX512F: # BB#0:
@@ -1536,7 +1536,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX512F-NEXT: movq %rbp, %rsp
; AVX512F-NEXT: popq %rbp
; AVX512F-NEXT: vzeroupper
-; AVX512F-NEXT: retq
+; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512BW-LABEL: v64i8:
; AVX512BW: # BB#0:
@@ -1544,7 +1544,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX512BW-NEXT: vpcmpgtb %zmm3, %zmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovq %k0, %rax
; AVX512BW-NEXT: vzeroupper
-; AVX512BW-NEXT: retq
+; AVX512BW-NEXT: ret{{[l|q]}}
%x0 = icmp sgt <64 x i8> %a, %b
%x1 = icmp sgt <64 x i8> %c, %d
%y = and <64 x i1> %x0, %x1
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