[llvm] r316271 - Fix MSVC 'result of 32-bit shift implicitly converted to 64 bits' warning. NFCI.

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sat Oct 21 10:23:04 2017
New Revision: 316271

URL: http://llvm.org/viewvc/llvm-project?rev=316271&view=rev
Log:
Fix MSVC 'result of 32-bit shift implicitly converted to 64 bits' warning. NFCI.

Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp?rev=316271&r1=316270&r2=316271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp Sat Oct 21 10:23:04 2017
@@ -1298,7 +1298,7 @@ inline bool HexagonDAGToDAGISel::SelectA
 bool HexagonDAGToDAGISel::SelectAnyImmediate(SDValue &N, SDValue &R,
                                              uint32_t LogAlign) {
   auto IsAligned = [LogAlign] (uint64_t V) -> bool {
-    return alignTo(V, 1u << LogAlign) == V;
+    return alignTo(V, (uint64_t)1 << LogAlign) == V;
   };
 
   switch (N.getOpcode()) {
@@ -1342,7 +1342,7 @@ bool HexagonDAGToDAGISel::SelectAnyImmed
 bool HexagonDAGToDAGISel::SelectGlobalAddress(SDValue &N, SDValue &R,
                                               bool UseGP, uint32_t LogAlign) {
   auto IsAligned = [LogAlign] (uint64_t V) -> bool {
-    return alignTo(V, 1u << LogAlign) == V;
+    return alignTo(V, (uint64_t)1 << LogAlign) == V;
   };
 
   switch (N.getOpcode()) {