[PATCH] D38967: [SelectionDAG] Don't subject ISD:Constant to the depth limit in TargetLowering::SimplifyDemandedBits.
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Fri Oct 20 19:27:51 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL316255: [SelectionDAG] Don't subject ISD:Constant to the depth limit in TargetLowering… (authored by ctopper).
Changed prior to commit:
https://reviews.llvm.org/D38967?vs=119189&id=119736#toc
Repository:
rL LLVM
https://reviews.llvm.org/D38967
Files:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Index: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -516,6 +516,13 @@
// Don't know anything.
Known = KnownBits(BitWidth);
+ if (Op.getOpcode() == ISD::Constant) {
+ // We know all of the bits for a constant!
+ Known.One = cast<ConstantSDNode>(Op)->getAPIntValue();
+ Known.Zero = ~Known.One;
+ return false;
+ }
+
// Other users may use these bits.
if (!Op.getNode()->hasOneUse() && !AssumeSingleUse) {
if (Depth != 0) {
@@ -538,11 +545,6 @@
KnownBits Known2, KnownOut;
switch (Op.getOpcode()) {
- case ISD::Constant:
- // We know all of the bits for a constant!
- Known.One = cast<ConstantSDNode>(Op)->getAPIntValue();
- Known.Zero = ~Known.One;
- return false; // Don't fall through, will infinitely loop.
case ISD::BUILD_VECTOR:
// Collect the known bits that are shared by every constant vector element.
Known.Zero.setAllBits(); Known.One.setAllBits();
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