[PATCH] D39150: [globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.
Daniel Sanders via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 20 16:46:33 PDT 2017
dsanders created this revision.
Herald added subscribers: igorb, javed.absar, kristof.beyls.
This patch enables the import of stores. Unfortunately, doing so by itself,
loses an optimization where storing 0 to memory makes use of WZR/XZR.
To mitigate this, this patch also introduces a new feature that allows register
classes to nominate a zero register. When this is done, GlobalISel will
substitute (G_CONSTANT 0) with the nominated register automatically
https://reviews.llvm.org/D39150
Files:
include/llvm/CodeGen/GlobalISel/InstructionSelector.h
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
include/llvm/Target/Target.td
lib/Target/AArch64/AArch64RegisterInfo.td
test/CodeGen/AArch64/GlobalISel/select-store.mir
utils/TableGen/GlobalISelEmitter.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D39150.119726.patch
Type: text/x-patch
Size: 10128 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171020/fb3aa711/attachment.bin>
More information about the llvm-commits
mailing list