[PATCH] D39046: [X86][SSE41] [AVX]Update instruction scheduling on btver2
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 20 09:35:51 PDT 2017
RKSimon added a comment.
In https://reviews.llvm.org/D39046#901587, @avt77 wrote:
> To rename as
>
> [X86][SSE41][AVX] Update instruction scheduling on btver2
Probably this would be best: "[X86][SSE41][AVX] Update DPPD/DPPS instruction scheduling on btver2"
================
Comment at: lib/Target/X86/X86ScheduleBtVer2.td:379
+ let Latency = 11;
+ let ResourceCycles = [4,4];
+ let NumMicroOps = 5;
----------------
AMD docs says this should be [3,3] - go with that
================
Comment at: lib/Target/X86/X86ScheduleBtVer2.td:386
+ let Latency = 16;
+ let ResourceCycles = [1,4,4];
+ let NumMicroOps = 6;
----------------
AMD docs says this should be [1,3,3] - go with that
https://reviews.llvm.org/D39046
More information about the llvm-commits
mailing list