[llvm] r315797 - [X86] Add additional patterns for folding loads with 128-bit VCVTDQ2PD and VCVTUDQ2PD.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 13 21:18:09 PDT 2017
Author: ctopper
Date: Fri Oct 13 21:18:09 2017
New Revision: 315797
URL: http://llvm.org/viewvc/llvm-project?rev=315797&view=rev
Log:
[X86] Add additional patterns for folding loads with 128-bit VCVTDQ2PD and VCVTUDQ2PD.
This matches the patterns we have for the SSE/AVX version.
This is a prerequisite for D38714.
Modified:
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=315797&r1=315796&r2=315797&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Fri Oct 13 21:18:09 2017
@@ -7055,6 +7055,16 @@ let Predicates = [HasAVX512, HasVLX] in
(v4i32 (X86cvttp2ui (v2f64 VR128X:$src)))))))),
(VCVTTPD2UDQZ128rr VR128X:$src)>;
}
+
+ def : Pat<(v2f64 (X86VSintToFP (bc_v4i32 (v2i64 (scalar_to_vector (loadi64 addr:$src)))))),
+ (VCVTDQ2PDZ128rm addr:$src)>;
+ def : Pat<(v2f64 (X86VSintToFP (bc_v4i32 (v2i64 (X86vzload addr:$src))))),
+ (VCVTDQ2PDZ128rm addr:$src)>;
+
+ def : Pat<(v2f64 (X86VUintToFP (bc_v4i32 (v2i64 (scalar_to_vector (loadi64 addr:$src)))))),
+ (VCVTUDQ2PDZ128rm addr:$src)>;
+ def : Pat<(v2f64 (X86VUintToFP (bc_v4i32 (v2i64 (X86vzload addr:$src))))),
+ (VCVTUDQ2PDZ128rm addr:$src)>;
}
let Predicates = [HasAVX512] in {
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