[llvm] r315756 - [Legalizer] Only allocate the SetVectors once per function.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 13 14:16:05 PDT 2017


Author: qcolombet
Date: Fri Oct 13 14:16:05 2017
New Revision: 315756

URL: http://llvm.org/viewvc/llvm-project?rev=315756&view=rev
Log:
[Legalizer] Only allocate the SetVectors once per function.

Prior to this patch we used to create SetVectors in temporaries that
were created and destroyed for each instruction. Now, instead we create
and destroyed them only once, but clear the content for each
instruction.
This speeds up the pass by ~25%.

NFC.

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp

Modified: llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp?rev=315756&r1=315755&r2=315756&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp Fri Oct 13 14:16:05 2017
@@ -70,6 +70,9 @@ bool Legalizer::runOnMachineFunction(Mac
   // convergence for performance reasons.
   bool Changed = false;
   MachineBasicBlock::iterator NextMI;
+  using VecType = SetVector<MachineInstr *, SmallVector<MachineInstr *, 8>>;
+  VecType WorkList;
+  VecType CombineList;
   for (auto &MBB : MF) {
     for (auto MI = MBB.begin(); MI != MBB.end(); MI = NextMI) {
       // Get the next Instruction before we try to legalize, because there's a
@@ -81,9 +84,8 @@ bool Legalizer::runOnMachineFunction(Mac
       if (!isPreISelGenericOpcode(MI->getOpcode()))
         continue;
       unsigned NumNewInsns = 0;
-      using VecType = SetVector<MachineInstr *, SmallVector<MachineInstr *, 8>>;
-      VecType WorkList;
-      VecType CombineList;
+      WorkList.clear();
+      CombineList.clear();
       Helper.MIRBuilder.recordInsertions([&](MachineInstr *MI) {
         // Only legalize pre-isel generic instructions.
         // Legalization process could generate Target specific pseudo




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