[llvm] r315701 - [InstCombine] allow zext(bool) + C --> select bool, C+1, C for vector types
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 13 09:29:38 PDT 2017
Author: spatel
Date: Fri Oct 13 09:29:38 2017
New Revision: 315701
URL: http://llvm.org/viewvc/llvm-project?rev=315701&view=rev
Log:
[InstCombine] allow zext(bool) + C --> select bool, C+1, C for vector types
The backend should be prepared for this transform after:
https://reviews.llvm.org/rL311731
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=315701&r1=315700&r2=315701&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Fri Oct 13 09:29:38 2017
@@ -953,6 +953,19 @@ static Value *checkForNegativeOperand(Bi
static Instruction *foldAddWithConstant(BinaryOperator &Add,
InstCombiner::BuilderTy &Builder) {
Value *Op0 = Add.getOperand(0), *Op1 = Add.getOperand(1);
+ Constant *Op1C;
+ if (!match(Op1, m_Constant(Op1C)))
+ return nullptr;
+
+ Value *X;
+ Type *Ty = Add.getType();
+ if (match(Op0, m_ZExt(m_Value(X))) &&
+ X->getType()->getScalarSizeInBits() == 1) {
+ // zext(bool) + C -> bool ? C + 1 : C
+ Constant *One = ConstantInt::get(Ty, 1);
+ return SelectInst::Create(X, ConstantExpr::getAdd(Op1C, One), Op1);
+ }
+
const APInt *C;
if (!match(Op1, m_APInt(C)))
return nullptr;
@@ -968,12 +981,9 @@ static Instruction *foldAddWithConstant(
return BinaryOperator::CreateXor(Op0, Op1);
}
- Value *X;
- const APInt *C2;
- Type *Ty = Add.getType();
-
// Is this add the last step in a convoluted sext?
// add(zext(xor i16 X, -32768), -32768) --> sext X
+ const APInt *C2;
if (match(Op0, m_ZExt(m_Xor(m_Value(X), m_APInt(C2)))) &&
C2->isMinSignedValue() && C2->sext(Ty->getScalarSizeInBits()) == *C)
return CastInst::Create(Instruction::SExt, X, Ty);
@@ -1031,13 +1041,8 @@ Instruction *InstCombiner::visitAdd(Bina
return X;
// FIXME: This should be moved into the above helper function to allow these
- // transforms for splat vectors.
+ // transforms for general constant or constant splat vectors.
if (ConstantInt *CI = dyn_cast<ConstantInt>(RHS)) {
- // zext(bool) + C -> bool ? C + 1 : C
- if (ZExtInst *ZI = dyn_cast<ZExtInst>(LHS))
- if (ZI->getSrcTy()->isIntegerTy(1))
- return SelectInst::Create(ZI->getOperand(0), AddOne(CI), CI);
-
Value *XorLHS = nullptr; ConstantInt *XorRHS = nullptr;
if (match(LHS, m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS)))) {
uint32_t TySizeBits = I.getType()->getScalarSizeInBits();
Modified: llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll?rev=315701&r1=315700&r2=315701&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/zext-bool-add-sub.ll Fri Oct 13 09:29:38 2017
@@ -73,8 +73,7 @@ define i32 @zext_add_scalar(i1 %x) {
define <2 x i32> @zext_add_vec_splat(<2 x i1> %x) {
; CHECK-LABEL: @zext_add_vec_splat(
-; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> %x to <2 x i32>
-; CHECK-NEXT: [[ADD:%.*]] = or <2 x i32> [[ZEXT]], <i32 42, i32 42>
+; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> %x, <2 x i32> <i32 43, i32 43>, <2 x i32> <i32 42, i32 42>
; CHECK-NEXT: ret <2 x i32> [[ADD]]
;
%zext = zext <2 x i1> %x to <2 x i32>
@@ -84,8 +83,7 @@ define <2 x i32> @zext_add_vec_splat(<2
define <2 x i32> @zext_add_vec(<2 x i1> %x) {
; CHECK-LABEL: @zext_add_vec(
-; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> %x to <2 x i32>
-; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw <2 x i32> [[ZEXT]], <i32 42, i32 23>
+; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> %x, <2 x i32> <i32 43, i32 24>, <2 x i32> <i32 42, i32 23>
; CHECK-NEXT: ret <2 x i32> [[ADD]]
;
%zext = zext <2 x i1> %x to <2 x i32>
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