[llvm] r315633 - TargetMachine: Merge TargetMachine and LLVMTargetMachine
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 12 15:28:55 PDT 2017
Author: matze
Date: Thu Oct 12 15:28:54 2017
New Revision: 315633
URL: http://llvm.org/viewvc/llvm-project?rev=315633&view=rev
Log:
TargetMachine: Merge TargetMachine and LLVMTargetMachine
Merge LLVMTargetMachine into TargetMachine.
- There is no in-tree target anymore that just implements TargetMachine
but not LLVMTargetMachine.
- It should still be possible to stub out all the various functions in
case a target does not want to use lib/CodeGen
- This simplifies the code and avoids methods ending up in the wrong
interface.
Differential Revision: https://reviews.llvm.org/D38489
Added:
llvm/trunk/lib/CodeGen/TargetMachine.cpp
- copied, changed from r315629, llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/CodeGen/TargetMachineC.cpp
- copied, changed from r315629, llvm/trunk/lib/Target/TargetMachineC.cpp
Removed:
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/Target/TargetMachine.cpp
llvm/trunk/lib/Target/TargetMachineC.cpp
Modified:
llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
llvm/trunk/include/llvm/MC/MCAsmInfo.h
llvm/trunk/include/llvm/Target/TargetMachine.h
llvm/trunk/lib/CodeGen/CMakeLists.txt
llvm/trunk/lib/CodeGen/MachineVerifier.cpp
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h
llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp
llvm/trunk/lib/Target/ARC/ARCTargetMachine.h
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/ARM/ARMTargetMachine.h
llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp
llvm/trunk/lib/Target/AVR/AVRTargetMachine.h
llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp
llvm/trunk/lib/Target/BPF/BPFTargetMachine.h
llvm/trunk/lib/Target/CMakeLists.txt
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h
llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp
llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.h
llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h
llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp
llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h
llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h
llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.h
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
llvm/trunk/tools/llc/llc.cpp
llvm/trunk/tools/opt/opt.cpp
llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp
Modified: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h (original)
+++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h Thu Oct 12 15:28:54 2017
@@ -21,10 +21,10 @@
namespace llvm {
-class LLVMTargetMachine;
struct MachineSchedContext;
class PassConfigImpl;
class ScheduleDAGInstrs;
+class TargetMachine;
// The old pass manager infrastructure is hidden in a legacy namespace now.
namespace legacy {
@@ -121,7 +121,7 @@ private:
void setStartStopPasses();
protected:
- LLVMTargetMachine *TM;
+ TargetMachine *TM;
PassConfigImpl *Impl = nullptr; // Internal data structures
bool Initialized = false; // Flagged after all passes are configured.
@@ -141,7 +141,7 @@ protected:
bool addCoreISelPasses();
public:
- TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm);
+ TargetPassConfig(TargetMachine &TM, PassManagerBase &pm);
// Dummy constructor.
TargetPassConfig();
@@ -378,7 +378,6 @@ protected:
virtual void addFastRegAlloc(FunctionPass *RegAllocPass);
/// addOptimizedRegAlloc - Add passes related to register allocation.
- /// LLVMTargetMachine provides standard regalloc passes for most targets.
virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass);
/// addPreRewrite - Add passes to the optimized register allocation pipeline
Modified: llvm/trunk/include/llvm/MC/MCAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmInfo.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCAsmInfo.h (original)
+++ llvm/trunk/include/llvm/MC/MCAsmInfo.h Thu Oct 12 15:28:54 2017
@@ -353,7 +353,7 @@ protected:
/// The integrated assembler should be enabled by default (by the
/// constructors) when failing to parse a valid piece of assembly (inline
/// or otherwise) is considered a bug. It may then be overridden after
- /// construction (see LLVMTargetMachine::initAsmInfo()).
+ /// construction (see TargetMachine::initAsmInfo()).
bool UseIntegratedAssembler;
/// Preserve Comments in assembly
Modified: llvm/trunk/include/llvm/Target/TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetMachine.h (original)
+++ llvm/trunk/include/llvm/Target/TargetMachine.h Thu Oct 12 15:28:54 2017
@@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
-// This file defines the TargetMachine and LLVMTargetMachine classes.
+/// \file Defines the TargetMachine interface.
//
//===----------------------------------------------------------------------===//
@@ -49,16 +49,16 @@ class PassManagerBase;
using legacy::PassManagerBase;
//===----------------------------------------------------------------------===//
-///
+
/// Primary interface to the complete machine description for the target
/// machine. All target-specific information should be accessible through this
/// interface.
-///
class TargetMachine {
protected: // Can only create subclasses.
TargetMachine(const Target &T, StringRef DataLayoutString,
const Triple &TargetTriple, StringRef CPU, StringRef FS,
- const TargetOptions &Options);
+ const TargetOptions &Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL);
/// The Target that this machine was created for.
const Target &TheTarget;
@@ -91,6 +91,8 @@ protected: // Can only create subclasses
unsigned RequireStructuredCFG : 1;
unsigned O0WantsFastISel : 1;
+ void initAsmInfo();
+
public:
const TargetOptions DefaultOptions;
mutable TargetOptions Options;
@@ -225,23 +227,18 @@ public:
/// supported, or false on success.
/// \p MMI is an optional parameter that, if set to non-nullptr,
/// will be used to set the MachineModuloInfo for this PM.
- virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
- CodeGenFileType,
- bool /*DisableVerify*/ = true,
- MachineModuleInfo *MMI = nullptr) {
- return true;
- }
+ virtual bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
+ CodeGenFileType FileType,
+ bool DisableVerify = true,
+ MachineModuleInfo *MMI = nullptr);
/// Add passes to the specified pass manager to get machine code emitted with
/// the MCJIT. This method returns true if machine code is not supported. It
/// fills the MCContext Ctx pointer which can be used to build custom
/// MCStreamer.
- ///
- virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
- raw_pwrite_stream &,
- bool /*DisableVerify*/ = true) {
- return true;
- }
+ virtual bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
+ raw_pwrite_stream &OS,
+ bool DisableVerify = true);
/// True if subtarget inserts the final scheduling pass on its own.
///
@@ -265,47 +262,11 @@ public:
virtual bool useIPRA() const {
return false;
}
-};
-
-/// This class describes a target machine that is implemented with the LLVM
-/// target-independent code generator.
-///
-class LLVMTargetMachine : public TargetMachine {
-protected: // Can only create subclasses.
- LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
- const Triple &TargetTriple, StringRef CPU, StringRef FS,
- const TargetOptions &Options, Reloc::Model RM,
- CodeModel::Model CM, CodeGenOpt::Level OL);
-
- void initAsmInfo();
-
-public:
- /// \brief Get a TargetIRAnalysis implementation for the target.
- ///
- /// This analysis will produce a TTI result which uses the common code
- /// generator to answer queries about the IR.
- TargetIRAnalysis getTargetIRAnalysis() override;
/// Create a pass configuration object to be used by addPassToEmitX methods
/// for generating a pipeline of CodeGen passes.
virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
- /// Add passes to the specified pass manager to get the specified file
- /// emitted. Typically this will involve several steps of code generation.
- /// \p MMI is an optional parameter that, if set to non-nullptr,
- /// will be used to set the MachineModuloInfofor this PM.
- bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
- CodeGenFileType FileType, bool DisableVerify = true,
- MachineModuleInfo *MMI = nullptr) override;
-
- /// Add passes to the specified pass manager to get machine code emitted with
- /// the MCJIT. This method returns true if machine code is not supported. It
- /// fills the MCContext Ctx pointer which can be used to build custom
- /// MCStreamer.
- bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
- raw_pwrite_stream &OS,
- bool DisableVerify = true) override;
-
/// Returns true if the target is expected to pass all machine verifier
/// checks. This is a stopgap measure to fix targets one by one. We will
/// remove this at some point and always enable the verifier when
Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CMakeLists.txt (original)
+++ llvm/trunk/lib/CodeGen/CMakeLists.txt Thu Oct 12 15:28:54 2017
@@ -53,7 +53,6 @@ add_llvm_library(LLVMCodeGen
LiveRegUnits.cpp
LiveStackAnalysis.cpp
LiveVariables.cpp
- LLVMTargetMachine.cpp
LocalStackSlotAllocation.cpp
LowLevelType.cpp
LowerEmuTLS.cpp
@@ -142,6 +141,8 @@ add_llvm_library(LLVMCodeGen
TargetInstrInfo.cpp
TargetLoweringBase.cpp
TargetLoweringObjectFileImpl.cpp
+ TargetMachine.cpp
+ TargetMachineC.cpp
TargetOptionsImpl.cpp
TargetPassConfig.cpp
TargetRegisterInfo.cpp
Removed: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=315632&view=auto
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (removed)
@@ -1,259 +0,0 @@
-//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the LLVMTargetMachine class.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Analysis/Passes.h"
-#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/BasicTTIImpl.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/IR/IRPrintingPasses.h"
-#include "llvm/IR/LegacyPassManager.h"
-#include "llvm/IR/Verifier.h"
-#include "llvm/MC/MCAsmBackend.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCCodeEmitter.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCInstrInfo.h"
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/FormattedStream.h"
-#include "llvm/Support/TargetRegistry.h"
-#include "llvm/Target/TargetLoweringObjectFile.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetOptions.h"
-#include "llvm/Transforms/Scalar.h"
-using namespace llvm;
-
-void LLVMTargetMachine::initAsmInfo() {
- MRI = TheTarget.createMCRegInfo(getTargetTriple().str());
- MII = TheTarget.createMCInstrInfo();
- // FIXME: Having an MCSubtargetInfo on the target machine is a hack due
- // to some backends having subtarget feature dependent module level
- // code generation. This is similar to the hack in the AsmPrinter for
- // module level assembly etc.
- STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(),
- getTargetFeatureString());
-
- MCAsmInfo *TmpAsmInfo =
- TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str());
- // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
- // and if the old one gets included then MCAsmInfo will be NULL and
- // we'll crash later.
- // Provide the user with a useful error message about what's wrong.
- assert(TmpAsmInfo && "MCAsmInfo not initialized. "
- "Make sure you include the correct TargetSelect.h"
- "and that InitializeAllTargetMCs() is being invoked!");
-
- if (Options.DisableIntegratedAS)
- TmpAsmInfo->setUseIntegratedAssembler(false);
-
- TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments);
-
- TmpAsmInfo->setCompressDebugSections(Options.CompressDebugSections);
-
- TmpAsmInfo->setRelaxELFRelocations(Options.RelaxELFRelocations);
-
- if (Options.ExceptionModel != ExceptionHandling::None)
- TmpAsmInfo->setExceptionsType(Options.ExceptionModel);
-
- AsmInfo = TmpAsmInfo;
-}
-
-LLVMTargetMachine::LLVMTargetMachine(const Target &T,
- StringRef DataLayoutString,
- const Triple &TT, StringRef CPU,
- StringRef FS, const TargetOptions &Options,
- Reloc::Model RM, CodeModel::Model CM,
- CodeGenOpt::Level OL)
- : TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) {
- this->RM = RM;
- this->CMModel = CM;
- this->OptLevel = OL;
-}
-
-TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
- return TargetIRAnalysis([this](const Function &F) {
- return TargetTransformInfo(BasicTTIImpl(this, F));
- });
-}
-
-/// addPassesToX helper drives creation and initialization of TargetPassConfig.
-static MCContext *
-addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
- bool DisableVerify, bool &WillCompleteCodeGenPipeline,
- raw_pwrite_stream &Out, MachineModuleInfo *MMI) {
- // Targets may override createPassConfig to provide a target-specific
- // subclass.
- TargetPassConfig *PassConfig = TM->createPassConfig(PM);
- // Set PassConfig options provided by TargetMachine.
- PassConfig->setDisableVerify(DisableVerify);
- WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline();
- PM.add(PassConfig);
- if (!MMI)
- MMI = new MachineModuleInfo(TM);
- PM.add(MMI);
-
- if (PassConfig->addISelPasses())
- return nullptr;
- PassConfig->addMachinePasses();
- PassConfig->setInitialized();
- if (!WillCompleteCodeGenPipeline)
- PM.add(createPrintMIRPass(Out));
-
- return &MMI->getContext();
-}
-
-bool LLVMTargetMachine::addAsmPrinter(PassManagerBase &PM,
- raw_pwrite_stream &Out, CodeGenFileType FileType,
- MCContext &Context) {
- if (Options.MCOptions.MCSaveTempLabels)
- Context.setAllowTemporaryLabels(false);
-
- const MCSubtargetInfo &STI = *getMCSubtargetInfo();
- const MCAsmInfo &MAI = *getMCAsmInfo();
- const MCRegisterInfo &MRI = *getMCRegisterInfo();
- const MCInstrInfo &MII = *getMCInstrInfo();
-
- std::unique_ptr<MCStreamer> AsmStreamer;
-
- switch (FileType) {
- case CGFT_AssemblyFile: {
- MCInstPrinter *InstPrinter = getTarget().createMCInstPrinter(
- getTargetTriple(), MAI.getAssemblerDialect(), MAI, MII, MRI);
-
- // Create a code emitter if asked to show the encoding.
- MCCodeEmitter *MCE = nullptr;
- if (Options.MCOptions.ShowMCEncoding)
- MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
-
- MCAsmBackend *MAB =
- getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
- Options.MCOptions);
- auto FOut = llvm::make_unique<formatted_raw_ostream>(Out);
- MCStreamer *S = getTarget().createAsmStreamer(
- Context, std::move(FOut), Options.MCOptions.AsmVerbose,
- Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB,
- Options.MCOptions.ShowMCInst);
- AsmStreamer.reset(S);
- break;
- }
- case CGFT_ObjectFile: {
- // Create the code emitter for the target if it exists. If not, .o file
- // emission fails.
- MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
- MCAsmBackend *MAB =
- getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
- Options.MCOptions);
- if (!MCE || !MAB)
- return true;
-
- // Don't waste memory on names of temp labels.
- Context.setUseNamesOnTempLabels(false);
-
- Triple T(getTargetTriple().str());
- AsmStreamer.reset(getTarget().createMCObjectStreamer(
- T, Context, std::unique_ptr<MCAsmBackend>(MAB), Out,
- std::unique_ptr<MCCodeEmitter>(MCE), STI, Options.MCOptions.MCRelaxAll,
- Options.MCOptions.MCIncrementalLinkerCompatible,
- /*DWARFMustBeAtTheEnd*/ true));
- break;
- }
- case CGFT_Null:
- // The Null output is intended for use for performance analysis and testing,
- // not real users.
- AsmStreamer.reset(getTarget().createNullStreamer(Context));
- break;
- }
-
- // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
- FunctionPass *Printer =
- getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
- if (!Printer)
- return true;
-
- PM.add(Printer);
- return false;
-}
-
-bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
- raw_pwrite_stream &Out,
- CodeGenFileType FileType,
- bool DisableVerify,
- MachineModuleInfo *MMI) {
- // Add common CodeGen passes.
- bool WillCompleteCodeGenPipeline = true;
- MCContext *Context = addPassesToGenerateCode(
- this, PM, DisableVerify, WillCompleteCodeGenPipeline, Out, MMI);
- if (!Context)
- return true;
-
- if (WillCompleteCodeGenPipeline && addAsmPrinter(PM, Out, FileType, *Context))
- return true;
-
- PM.add(createFreeMachineFunctionPass());
- return false;
-}
-
-/// addPassesToEmitMC - Add passes to the specified pass manager to get
-/// machine code emitted with the MCJIT. This method returns true if machine
-/// code is not supported. It fills the MCContext Ctx pointer which can be
-/// used to build custom MCStreamer.
-///
-bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
- raw_pwrite_stream &Out,
- bool DisableVerify) {
- // Add common CodeGen passes.
- bool WillCompleteCodeGenPipeline = true;
- Ctx = addPassesToGenerateCode(this, PM, DisableVerify,
- WillCompleteCodeGenPipeline, Out,
- /*MachineModuleInfo*/ nullptr);
- if (!Ctx)
- return true;
- assert(WillCompleteCodeGenPipeline && "CodeGen pipeline has been altered");
-
- if (Options.MCOptions.MCSaveTempLabels)
- Ctx->setAllowTemporaryLabels(false);
-
- // Create the code emitter for the target if it exists. If not, .o file
- // emission fails.
- const MCRegisterInfo &MRI = *getMCRegisterInfo();
- MCCodeEmitter *MCE =
- getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx);
- MCAsmBackend *MAB =
- getTarget().createMCAsmBackend(MRI, getTargetTriple().str(), TargetCPU,
- Options.MCOptions);
- if (!MCE || !MAB)
- return true;
-
- const Triple &T = getTargetTriple();
- const MCSubtargetInfo &STI = *getMCSubtargetInfo();
- std::unique_ptr<MCStreamer> AsmStreamer(getTarget().createMCObjectStreamer(
- T, *Ctx, std::unique_ptr<MCAsmBackend>(MAB), Out,
- std::unique_ptr<MCCodeEmitter>(MCE), STI, Options.MCOptions.MCRelaxAll,
- Options.MCOptions.MCIncrementalLinkerCompatible,
- /*DWARFMustBeAtTheEnd*/ true));
-
- // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
- FunctionPass *Printer =
- getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
- if (!Printer)
- return true;
-
- PM.add(Printer);
- PM.add(createFreeMachineFunctionPass());
-
- return false; // success!
-}
Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Thu Oct 12 15:28:54 2017
@@ -17,10 +17,8 @@
// Register live intervals: Registers must be defined only once, and must be
// defined before use.
//
-// The machine code verifier is enabled from LLVMTargetMachine.cpp with the
-// command-line option -verify-machineinstrs, or by defining the environment
-// variable LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive
-// the verifier errors.
+// The machine code verifier is enabled with the command-line option
+// -verify-machineinstrs.
//===----------------------------------------------------------------------===//
#include "llvm/ADT/BitVector.h"
Copied: llvm/trunk/lib/CodeGen/TargetMachine.cpp (from r315629, llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetMachine.cpp?p2=llvm/trunk/lib/CodeGen/TargetMachine.cpp&p1=llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp&r1=315629&r2=315633&rev=315633&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -1,4 +1,4 @@
-//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
+//===-- TargetMachine.cpp - Implement the TargetMachine class -------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,10 +7,12 @@
//
//===----------------------------------------------------------------------===//
//
-// This file implements the LLVMTargetMachine class.
+/// \file Implements the TargetMachine class.
//
//===----------------------------------------------------------------------===//
+#include "llvm/Target/TargetMachine.h"
+
#include "llvm/Analysis/Passes.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/BasicTTIImpl.h"
@@ -19,6 +21,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/IRPrintingPasses.h"
#include "llvm/IR/LegacyPassManager.h"
+#include "llvm/IR/Mangler.h"
#include "llvm/IR/Verifier.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCAsmInfo.h"
@@ -32,12 +35,187 @@
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
-#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/Scalar.h"
using namespace llvm;
-void LLVMTargetMachine::initAsmInfo() {
+TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
+ const Triple &TT, StringRef CPU, StringRef FS,
+ const TargetOptions &Options, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level OL)
+ : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
+ TargetFS(FS), RM(RM), CMModel(CM), OptLevel(OL), AsmInfo(nullptr),
+ MRI(nullptr), MII(nullptr), STI(nullptr), RequireStructuredCFG(false),
+ DefaultOptions(Options), Options(Options) {
+}
+
+TargetMachine::~TargetMachine() {
+ delete AsmInfo;
+ delete MRI;
+ delete MII;
+ delete STI;
+}
+
+bool TargetMachine::isPositionIndependent() const {
+ return getRelocationModel() == Reloc::PIC_;
+}
+
+// FIXME: This function needs to go away for a number of reasons:
+// a) global state on the TargetMachine is terrible in general,
+// b) these target options should be passed only on the function
+// and not on the TargetMachine (via TargetOptions) at all.
+void TargetMachine::resetTargetOptions(const Function &F) const {
+#define RESET_OPTION(X, Y) \
+ do { \
+ if (F.hasFnAttribute(Y)) \
+ Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \
+ else \
+ Options.X = DefaultOptions.X; \
+ } while (0)
+
+ RESET_OPTION(UnsafeFPMath, "unsafe-fp-math");
+ RESET_OPTION(NoInfsFPMath, "no-infs-fp-math");
+ RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
+ RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math");
+ RESET_OPTION(NoTrappingFPMath, "no-trapping-math");
+
+ StringRef Denormal =
+ F.getFnAttribute("denormal-fp-math").getValueAsString();
+ if (Denormal == "ieee")
+ Options.FPDenormalMode = FPDenormal::IEEE;
+ else if (Denormal == "preserve-sign")
+ Options.FPDenormalMode = FPDenormal::PreserveSign;
+ else if (Denormal == "positive-zero")
+ Options.FPDenormalMode = FPDenormal::PositiveZero;
+ else
+ Options.FPDenormalMode = DefaultOptions.FPDenormalMode;
+}
+
+Reloc::Model TargetMachine::getRelocationModel() const { return RM; }
+
+CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; }
+
+/// Get the IR-specified TLS model for Var.
+static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) {
+ switch (GV->getThreadLocalMode()) {
+ case GlobalVariable::NotThreadLocal:
+ llvm_unreachable("getSelectedTLSModel for non-TLS variable");
+ break;
+ case GlobalVariable::GeneralDynamicTLSModel:
+ return TLSModel::GeneralDynamic;
+ case GlobalVariable::LocalDynamicTLSModel:
+ return TLSModel::LocalDynamic;
+ case GlobalVariable::InitialExecTLSModel:
+ return TLSModel::InitialExec;
+ case GlobalVariable::LocalExecTLSModel:
+ return TLSModel::LocalExec;
+ }
+ llvm_unreachable("invalid TLS model");
+}
+
+bool TargetMachine::shouldAssumeDSOLocal(const Module &M,
+ const GlobalValue *GV) const {
+ Reloc::Model RM = getRelocationModel();
+ const Triple &TT = getTargetTriple();
+
+ // DLLImport explicitly marks the GV as external.
+ if (GV && GV->hasDLLImportStorageClass())
+ return false;
+
+ // Every other GV is local on COFF.
+ // Make an exception for windows OS in the triple: Some firmwares builds use
+ // *-win32-macho triples. This (accidentally?) produced windows relocations
+ // without GOT tables in older clang versions; Keep this behaviour.
+ if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO()))
+ return true;
+
+ if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility()))
+ return true;
+
+ if (TT.isOSBinFormatMachO()) {
+ if (RM == Reloc::Static)
+ return true;
+ return GV && GV->isStrongDefinitionForLinker();
+ }
+
+ assert(TT.isOSBinFormatELF());
+ assert(RM != Reloc::DynamicNoPIC);
+
+ bool IsExecutable =
+ RM == Reloc::Static || M.getPIELevel() != PIELevel::Default;
+ if (IsExecutable) {
+ // If the symbol is defined, it cannot be preempted.
+ if (GV && !GV->isDeclarationForLinker())
+ return true;
+
+ bool IsTLS = GV && GV->isThreadLocal();
+ bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV &&
+ isa<GlobalVariable>(GV) &&
+ !GV->hasExternalWeakLinkage();
+ Triple::ArchType Arch = TT.getArch();
+ bool IsPPC =
+ Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le;
+ // Check if we can use copy relocations. PowerPC has no copy relocations.
+ if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs))
+ return true;
+ }
+
+ // ELF supports preemption of other symbols.
+ return false;
+}
+
+TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const {
+ bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default;
+ Reloc::Model RM = getRelocationModel();
+ bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE;
+ bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV);
+
+ TLSModel::Model Model;
+ if (IsSharedLibrary) {
+ if (IsLocal)
+ Model = TLSModel::LocalDynamic;
+ else
+ Model = TLSModel::GeneralDynamic;
+ } else {
+ if (IsLocal)
+ Model = TLSModel::LocalExec;
+ else
+ Model = TLSModel::InitialExec;
+ }
+
+ // If the user specified a more specific model, use that.
+ TLSModel::Model SelectedModel = getSelectedTLSModel(GV);
+ if (SelectedModel > Model)
+ return SelectedModel;
+
+ return Model;
+}
+
+CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; }
+
+void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; }
+
+void TargetMachine::getNameWithPrefix(SmallVectorImpl<char> &Name,
+ const GlobalValue *GV, Mangler &Mang,
+ bool MayAlwaysUsePrivate) const {
+ if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) {
+ // Simple case: If GV is not private, it is not important to find out if
+ // private labels are legal in this case or not.
+ Mang.getNameWithPrefix(Name, GV, false);
+ return;
+ }
+ const TargetLoweringObjectFile *TLOF = getObjFileLowering();
+ TLOF->getNameWithPrefix(Name, GV, *this);
+}
+
+MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const {
+ const TargetLoweringObjectFile *TLOF = getObjFileLowering();
+ SmallString<128> NameStr;
+ getNameWithPrefix(NameStr, GV, TLOF->getMangler());
+ return TLOF->getContext().getOrCreateSymbol(NameStr);
+}
+
+void TargetMachine::initAsmInfo() {
MRI = TheTarget.createMCRegInfo(getTargetTriple().str());
MII = TheTarget.createMCInstrInfo();
// FIXME: Having an MCSubtargetInfo on the target machine is a hack due
@@ -72,19 +250,7 @@ void LLVMTargetMachine::initAsmInfo() {
AsmInfo = TmpAsmInfo;
}
-LLVMTargetMachine::LLVMTargetMachine(const Target &T,
- StringRef DataLayoutString,
- const Triple &TT, StringRef CPU,
- StringRef FS, const TargetOptions &Options,
- Reloc::Model RM, CodeModel::Model CM,
- CodeGenOpt::Level OL)
- : TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) {
- this->RM = RM;
- this->CMModel = CM;
- this->OptLevel = OL;
-}
-
-TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
+TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
return TargetIRAnalysis([this](const Function &F) {
return TargetTransformInfo(BasicTTIImpl(this, F));
});
@@ -92,7 +258,7 @@ TargetIRAnalysis LLVMTargetMachine::getT
/// addPassesToX helper drives creation and initialization of TargetPassConfig.
static MCContext *
-addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
+addPassesToGenerateCode(TargetMachine *TM, PassManagerBase &PM,
bool DisableVerify, bool &WillCompleteCodeGenPipeline,
raw_pwrite_stream &Out, MachineModuleInfo *MMI) {
// Targets may override createPassConfig to provide a target-specific
@@ -116,7 +282,7 @@ addPassesToGenerateCode(LLVMTargetMachin
return &MMI->getContext();
}
-bool LLVMTargetMachine::addAsmPrinter(PassManagerBase &PM,
+bool TargetMachine::addAsmPrinter(PassManagerBase &PM,
raw_pwrite_stream &Out, CodeGenFileType FileType,
MCContext &Context) {
if (Options.MCOptions.MCSaveTempLabels)
@@ -188,11 +354,11 @@ bool LLVMTargetMachine::addAsmPrinter(Pa
return false;
}
-bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
- raw_pwrite_stream &Out,
- CodeGenFileType FileType,
- bool DisableVerify,
- MachineModuleInfo *MMI) {
+bool TargetMachine::addPassesToEmitFile(PassManagerBase &PM,
+ raw_pwrite_stream &Out,
+ CodeGenFileType FileType,
+ bool DisableVerify,
+ MachineModuleInfo *MMI) {
// Add common CodeGen passes.
bool WillCompleteCodeGenPipeline = true;
MCContext *Context = addPassesToGenerateCode(
@@ -207,14 +373,9 @@ bool LLVMTargetMachine::addPassesToEmitF
return false;
}
-/// addPassesToEmitMC - Add passes to the specified pass manager to get
-/// machine code emitted with the MCJIT. This method returns true if machine
-/// code is not supported. It fills the MCContext Ctx pointer which can be
-/// used to build custom MCStreamer.
-///
-bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
- raw_pwrite_stream &Out,
- bool DisableVerify) {
+bool TargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
+ raw_pwrite_stream &Out,
+ bool DisableVerify) {
// Add common CodeGen passes.
bool WillCompleteCodeGenPipeline = true;
Ctx = addPassesToGenerateCode(this, PM, DisableVerify,
Copied: llvm/trunk/lib/CodeGen/TargetMachineC.cpp (from r315629, llvm/trunk/lib/Target/TargetMachineC.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetMachineC.cpp?p2=llvm/trunk/lib/CodeGen/TargetMachineC.cpp&p1=llvm/trunk/lib/Target/TargetMachineC.cpp&r1=315629&r2=315633&rev=315633&view=diff
==============================================================================
(empty)
Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Thu Oct 12 15:28:54 2017
@@ -355,7 +355,7 @@ void TargetPassConfig::setStartStopPasse
// Out of line constructor provides default values for pass options and
// registers all common codegen passes.
-TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm)
+TargetPassConfig::TargetPassConfig(TargetMachine &TM, PassManagerBase &pm)
: ImmutablePass(ID), PM(&pm), TM(&TM) {
Impl = new PassConfigImpl();
@@ -408,7 +408,7 @@ void TargetPassConfig::insertPass(Analys
/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
///
/// Targets may override this to extend TargetPassConfig.
-TargetPassConfig *LLVMTargetMachine::createPassConfig(PassManagerBase &PM) {
+TargetPassConfig *TargetMachine::createPassConfig(PassManagerBase &PM) {
return new TargetPassConfig(*this, PM);
}
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -237,10 +237,9 @@ AArch64TargetMachine::AArch64TargetMachi
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool LittleEndian)
- : LLVMTargetMachine(T,
- computeDataLayout(TT, Options.MCOptions, LittleEndian),
- TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(TT, CM, JIT), OL),
+ : TargetMachine(T, computeDataLayout(TT, Options.MCOptions, LittleEndian),
+ TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(TT, CM, JIT), OL),
TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) {
initAsmInfo();
}
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h Thu Oct 12 15:28:54 2017
@@ -23,7 +23,7 @@ namespace llvm {
class AArch64RegisterBankInfo;
-class AArch64TargetMachine : public LLVMTargetMachine {
+class AArch64TargetMachine : public TargetMachine {
protected:
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -290,9 +290,9 @@ AMDGPUTargetMachine::AMDGPUTargetMachine
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OptLevel)
- : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),
- FS, Options, getEffectiveRelocModel(RM),
- getEffectiveCodeModel(CM), OptLevel),
+ : TargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),
+ FS, Options, getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM), OptLevel),
TLOF(createTLOF(getTargetTriple())) {
AS = AMDGPU::getAMDGPUAS(TT);
initAsmInfo();
@@ -471,7 +471,7 @@ namespace {
class AMDGPUPassConfig : public TargetPassConfig {
public:
- AMDGPUPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
+ AMDGPUPassConfig(TargetMachine &TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {
// Exceptions and StackMaps are not supported, so these passes will never do
// anything.
@@ -502,7 +502,7 @@ public:
class R600PassConfig final : public AMDGPUPassConfig {
public:
- R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
+ R600PassConfig(TargetMachine &TM, PassManagerBase &PM)
: AMDGPUPassConfig(TM, PM) {}
ScheduleDAGInstrs *createMachineScheduler(
@@ -519,7 +519,7 @@ public:
class GCNPassConfig final : public AMDGPUPassConfig {
public:
- GCNPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
+ GCNPassConfig(TargetMachine &TM, PassManagerBase &PM)
: AMDGPUPassConfig(TM, PM) {
// It is necessary to know the register usage of the entire call graph. We
// allow calls without EnableAMDGPUFunctionCalls if they are marked
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -31,7 +31,7 @@ namespace llvm {
// AMDGPU Target Machine (R600+)
//===----------------------------------------------------------------------===//
-class AMDGPUTargetMachine : public LLVMTargetMachine {
+class AMDGPUTargetMachine : public TargetMachine {
protected:
std::unique_ptr<TargetLoweringObjectFile> TLOF;
AMDGPUIntrinsicInfo IntrinsicInfo;
Modified: llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARC/ARCTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -39,11 +39,10 @@ ARCTargetMachine::ARCTargetMachine(const
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T,
- "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
- "f32:32:32-i64:32-f64:32-a:0:32-n32",
- TT, CPU, FS, Options, getRelocModel(RM),
- getEffectiveCodeModel(CM), OL),
+ : TargetMachine(T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+ "f32:32:32-i64:32-f64:32-a:0:32-n32",
+ TT, CPU, FS, Options, getRelocModel(RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
Modified: llvm/trunk/lib/Target/ARC/ARCTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARC/ARCTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARC/ARCTargetMachine.h (original)
+++ llvm/trunk/lib/Target/ARC/ARCTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -21,7 +21,7 @@ namespace llvm {
class TargetPassConfig;
-class ARCTargetMachine : public LLVMTargetMachine {
+class ARCTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
ARCSubtarget Subtarget;
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -205,9 +205,9 @@ ARMBaseTargetMachine::ARMBaseTargetMachi
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool isLittle)
- : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
- CPU, FS, Options, getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(CM), OL),
+ : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
+ CPU, FS, Options, getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(CM), OL),
TargetABI(computeTargetABI(TT, CPU, Options)),
TLOF(createTLOF(getTargetTriple())), isLittle(isLittle) {
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -25,7 +25,7 @@
namespace llvm {
-class ARMBaseTargetMachine : public LLVMTargetMachine {
+class ARMBaseTargetMachine : public TargetMachine {
public:
enum ARMABI {
ARM_ABI_UNKNOWN,
Modified: llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AVR/AVRTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -52,9 +52,8 @@ AVRTargetMachine::AVRTargetMachine(const
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options,
- getEffectiveRelocModel(RM), getEffectiveCodeModel(CM),
- OL),
+ : TargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options,
+ getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL),
SubTarget(TT, getCPU(CPU), FS, *this) {
this->TLOF = make_unique<AVRTargetObjectFile>();
initAsmInfo();
Modified: llvm/trunk/lib/Target/AVR/AVRTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AVR/AVRTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AVR/AVRTargetMachine.h (original)
+++ llvm/trunk/lib/Target/AVR/AVRTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -26,12 +26,11 @@
namespace llvm {
/// A generic AVR implementation.
-class AVRTargetMachine : public LLVMTargetMachine {
+class AVRTargetMachine : public TargetMachine {
public:
AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
- Optional<Reloc::Model> RM,
- Optional<CodeModel::Model> CM,
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT);
const AVRSubtarget *getSubtargetImpl() const;
Modified: llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -55,9 +55,8 @@ BPFTargetMachine::BPFTargetMachine(const
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
- getEffectiveRelocModel(RM), getEffectiveCodeModel(CM),
- OL),
+ : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
+ getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
Modified: llvm/trunk/lib/Target/BPF/BPFTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/BPFTargetMachine.h (original)
+++ llvm/trunk/lib/Target/BPF/BPFTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -18,7 +18,7 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
-class BPFTargetMachine : public LLVMTargetMachine {
+class BPFTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
BPFSubtarget Subtarget;
Modified: llvm/trunk/lib/Target/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CMakeLists.txt?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/CMakeLists.txt Thu Oct 12 15:28:54 2017
@@ -6,8 +6,6 @@ add_llvm_library(LLVMTarget
Target.cpp
TargetIntrinsicInfo.cpp
TargetLoweringObjectFile.cpp
- TargetMachine.cpp
- TargetMachineC.cpp
ADDITIONAL_HEADER_DIRS
${LLVM_MAIN_INCLUDE_DIR}/llvm/Target
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -194,7 +194,7 @@ HexagonTargetMachine::HexagonTargetMachi
// Specify the vector alignment explicitly. For v512x1, the calculated
// alignment would be 512*alignment(i1), which is 512 bytes, instead of
// the required minimum of 64 bytes.
- : LLVMTargetMachine(
+ : TargetMachine(
T,
"e-m:e-p:32:32:32-a:0-n16:32-"
"i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -23,7 +23,7 @@ namespace llvm {
class Module;
-class HexagonTargetMachine : public LLVMTargetMachine {
+class HexagonTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<HexagonSubtarget>> SubtargetMap;
Modified: llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -65,9 +65,9 @@ LanaiTargetMachine::LanaiTargetMachine(c
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CodeModel,
CodeGenOpt::Level OptLevel, bool JIT)
- : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
- getEffectiveRelocModel(RM),
- getEffectiveCodeModel(CodeModel), OptLevel),
+ : TargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
+ getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CodeModel), OptLevel),
Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
OptLevel),
TLOF(new LanaiTargetObjectFile()) {
Modified: llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -25,7 +25,7 @@
namespace llvm {
class formatted_raw_ostream;
-class LanaiTargetMachine : public LLVMTargetMachine {
+class LanaiTargetMachine : public TargetMachine {
LanaiSubtarget Subtarget;
std::unique_ptr<TargetLoweringObjectFile> TLOF;
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -49,9 +49,9 @@ MSP430TargetMachine::MSP430TargetMachine
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
- Options, getEffectiveRelocModel(RM),
- getEffectiveCodeModel(CM), OL),
+ : TargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
+ Options, getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h Thu Oct 12 15:28:54 2017
@@ -23,7 +23,7 @@ namespace llvm {
/// MSP430TargetMachine
///
-class MSP430TargetMachine : public LLVMTargetMachine {
+class MSP430TargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
MSP430Subtarget Subtarget;
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp Thu Oct 12 15:28:54 2017
@@ -686,7 +686,7 @@ MipsTargetELFStreamer::MipsTargetELFStre
MCAssembler &MCA = getStreamer().getAssembler();
// It's possible that MCObjectFileInfo isn't fully initialized at this point
- // due to an initialization order problem where LLVMTargetMachine creates the
+ // due to an initialization order problem where TargetMachine creates the
// target streamer before TargetLoweringObjectFile calls
// InitializeMCObjectFileInfo. There doesn't seem to be a single place that
// covers all cases so this statement covers most cases and direct object
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -109,9 +109,9 @@ MipsTargetMachine::MipsTargetMachine(con
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT,
bool isLittle)
- : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
- CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
- getEffectiveCodeModel(CM), OL),
+ : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
+ CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
+ getEffectiveCodeModel(CM), OL),
isLittle(isLittle), TLOF(llvm::make_unique<MipsTargetObjectFile>()),
ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this,
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -25,7 +25,7 @@
namespace llvm {
-class MipsTargetMachine : public LLVMTargetMachine {
+class MipsTargetMachine : public TargetMachine {
bool isLittle;
std::unique_ptr<TargetLoweringObjectFile> TLOF;
// Selected ABI
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -100,8 +100,8 @@ NVPTXTargetMachine::NVPTXTargetMachine(c
CodeGenOpt::Level OL, bool is64bit)
// The pic relocation model is used regardless of what the client has
// specified, as it is the only relocation model currently supported.
- : LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options,
- Reloc::PIC_, getEffectiveCodeModel(CM), OL),
+ : TargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options,
+ Reloc::PIC_, getEffectiveCodeModel(CM), OL),
is64bit(is64bit), TLOF(llvm::make_unique<NVPTXTargetObjectFile>()),
Subtarget(TT, CPU, FS, *this) {
if (TT.getOS() == Triple::NVCL)
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -24,7 +24,7 @@ namespace llvm {
/// NVPTXTargetMachine
///
-class NVPTXTargetMachine : public LLVMTargetMachine {
+class NVPTXTargetMachine : public TargetMachine {
bool is64bit;
std::unique_ptr<TargetLoweringObjectFile> TLOF;
NVPTX::DrvInterface drvInterface;
Modified: llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -42,8 +42,8 @@ Nios2TargetMachine::Nios2TargetMachine(c
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T, computeDataLayout(), TT, CPU, FS, Options,
- getEffectiveRelocModel(RM), *CM, OL) {}
+ : TargetMachine(T, computeDataLayout(), TT, CPU, FS, Options,
+ getEffectiveRelocModel(RM), *CM, OL) {}
Nios2TargetMachine::~Nios2TargetMachine() {}
Modified: llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h (original)
+++ llvm/trunk/lib/Target/Nios2/Nios2TargetMachine.h Thu Oct 12 15:28:54 2017
@@ -18,7 +18,7 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
-class Nios2TargetMachine : public LLVMTargetMachine {
+class Nios2TargetMachine : public TargetMachine {
mutable StringMap<std::unique_ptr<Nios2Subtarget>> SubtargetMap;
public:
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -225,7 +225,7 @@ static CodeModel::Model getEffectiveCode
// The FeatureString here is a little subtle. We are modifying the feature
// string with what are (currently) non-function specific overrides as it goes
-// into the LLVMTargetMachine constructor and then using the stored value in the
+// into the TargetMachine constructor and then using the stored value in the
// Subtarget constructor below it.
PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
@@ -233,10 +233,10 @@ PPCTargetMachine::PPCTargetMachine(const
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
- computeFSAdditions(FS, OL, TT), Options,
- getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(TT, CM, JIT), OL),
+ : TargetMachine(T, getDataLayoutString(TT), TT, CPU,
+ computeFSAdditions(FS, OL, TT), Options,
+ getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(TT, CM, JIT), OL),
TLOF(createTLOF(getTargetTriple())),
TargetABI(computeTargetABI(TT, Options)) {
initAsmInfo();
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -23,7 +23,7 @@ namespace llvm {
/// Common code between 32-bit and 64-bit PowerPC targets.
///
-class PPCTargetMachine final : public LLVMTargetMachine {
+class PPCTargetMachine final : public TargetMachine {
public:
enum PPCABI { PPC_ABI_UNKNOWN, PPC_ABI_ELFv1, PPC_ABI_ELFv2 };
private:
Modified: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -55,9 +55,9 @@ RISCVTargetMachine::RISCVTargetMachine(c
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
- getEffectiveRelocModel(TT, RM),
- getEffectiveCodeModel(CM), OL),
+ : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
+ getEffectiveRelocModel(TT, RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(make_unique<TargetLoweringObjectFileELF>()) {
initAsmInfo();
}
Modified: llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -20,7 +20,7 @@
#include "llvm/Target/TargetMachine.h"
namespace llvm {
-class RISCVTargetMachine : public LLVMTargetMachine {
+class RISCVTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
public:
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -88,7 +88,7 @@ SparcTargetMachine::SparcTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit)
- : LLVMTargetMachine(
+ : TargetMachine(
T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), is64bit, JIT),
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -20,7 +20,7 @@
namespace llvm {
-class SparcTargetMachine : public LLVMTargetMachine {
+class SparcTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
SparcSubtarget Subtarget;
bool is64Bit;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -143,7 +143,7 @@ SystemZTargetMachine::SystemZTargetMachi
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(
+ : TargetMachine(
T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL),
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -25,7 +25,7 @@
namespace llvm {
-class SystemZTargetMachine : public LLVMTargetMachine {
+class SystemZTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
SystemZSubtarget Subtarget;
@@ -42,7 +42,7 @@ public:
return &Subtarget;
}
- // Override LLVMTargetMachine
+ // Override TargetMachine
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
TargetIRAnalysis getTargetIRAnalysis() override;
Removed: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=315632&view=auto
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp (removed)
@@ -1,222 +0,0 @@
-//===-- TargetMachine.cpp - General Target Information ---------------------==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes the general parts of a Target machine.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Analysis/TargetTransformInfo.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/GlobalAlias.h"
-#include "llvm/IR/GlobalValue.h"
-#include "llvm/IR/GlobalVariable.h"
-#include "llvm/IR/LegacyPassManager.h"
-#include "llvm/IR/Mangler.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCInstrInfo.h"
-#include "llvm/MC/MCSectionMachO.h"
-#include "llvm/MC/MCTargetOptions.h"
-#include "llvm/MC/SectionKind.h"
-#include "llvm/Target/TargetLowering.h"
-#include "llvm/Target/TargetLoweringObjectFile.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-using namespace llvm;
-
-//---------------------------------------------------------------------------
-// TargetMachine Class
-//
-
-TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
- const Triple &TT, StringRef CPU, StringRef FS,
- const TargetOptions &Options)
- : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
- TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr),
- RequireStructuredCFG(false), DefaultOptions(Options), Options(Options) {
-}
-
-TargetMachine::~TargetMachine() {
- delete AsmInfo;
- delete MRI;
- delete MII;
- delete STI;
-}
-
-bool TargetMachine::isPositionIndependent() const {
- return getRelocationModel() == Reloc::PIC_;
-}
-
-/// \brief Reset the target options based on the function's attributes.
-// FIXME: This function needs to go away for a number of reasons:
-// a) global state on the TargetMachine is terrible in general,
-// b) these target options should be passed only on the function
-// and not on the TargetMachine (via TargetOptions) at all.
-void TargetMachine::resetTargetOptions(const Function &F) const {
-#define RESET_OPTION(X, Y) \
- do { \
- if (F.hasFnAttribute(Y)) \
- Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \
- else \
- Options.X = DefaultOptions.X; \
- } while (0)
-
- RESET_OPTION(UnsafeFPMath, "unsafe-fp-math");
- RESET_OPTION(NoInfsFPMath, "no-infs-fp-math");
- RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
- RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math");
- RESET_OPTION(NoTrappingFPMath, "no-trapping-math");
-
- StringRef Denormal =
- F.getFnAttribute("denormal-fp-math").getValueAsString();
- if (Denormal == "ieee")
- Options.FPDenormalMode = FPDenormal::IEEE;
- else if (Denormal == "preserve-sign")
- Options.FPDenormalMode = FPDenormal::PreserveSign;
- else if (Denormal == "positive-zero")
- Options.FPDenormalMode = FPDenormal::PositiveZero;
- else
- Options.FPDenormalMode = DefaultOptions.FPDenormalMode;
-}
-
-/// Returns the code generation relocation model. The choices are static, PIC,
-/// and dynamic-no-pic.
-Reloc::Model TargetMachine::getRelocationModel() const { return RM; }
-
-/// Returns the code model. The choices are small, kernel, medium, large, and
-/// target default.
-CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; }
-
-/// Get the IR-specified TLS model for Var.
-static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) {
- switch (GV->getThreadLocalMode()) {
- case GlobalVariable::NotThreadLocal:
- llvm_unreachable("getSelectedTLSModel for non-TLS variable");
- break;
- case GlobalVariable::GeneralDynamicTLSModel:
- return TLSModel::GeneralDynamic;
- case GlobalVariable::LocalDynamicTLSModel:
- return TLSModel::LocalDynamic;
- case GlobalVariable::InitialExecTLSModel:
- return TLSModel::InitialExec;
- case GlobalVariable::LocalExecTLSModel:
- return TLSModel::LocalExec;
- }
- llvm_unreachable("invalid TLS model");
-}
-
-bool TargetMachine::shouldAssumeDSOLocal(const Module &M,
- const GlobalValue *GV) const {
- Reloc::Model RM = getRelocationModel();
- const Triple &TT = getTargetTriple();
-
- // DLLImport explicitly marks the GV as external.
- if (GV && GV->hasDLLImportStorageClass())
- return false;
-
- // Every other GV is local on COFF.
- // Make an exception for windows OS in the triple: Some firmwares builds use
- // *-win32-macho triples. This (accidentally?) produced windows relocations
- // without GOT tables in older clang versions; Keep this behaviour.
- if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO()))
- return true;
-
- if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility()))
- return true;
-
- if (TT.isOSBinFormatMachO()) {
- if (RM == Reloc::Static)
- return true;
- return GV && GV->isStrongDefinitionForLinker();
- }
-
- assert(TT.isOSBinFormatELF());
- assert(RM != Reloc::DynamicNoPIC);
-
- bool IsExecutable =
- RM == Reloc::Static || M.getPIELevel() != PIELevel::Default;
- if (IsExecutable) {
- // If the symbol is defined, it cannot be preempted.
- if (GV && !GV->isDeclarationForLinker())
- return true;
-
- bool IsTLS = GV && GV->isThreadLocal();
- bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV &&
- isa<GlobalVariable>(GV) &&
- !GV->hasExternalWeakLinkage();
- Triple::ArchType Arch = TT.getArch();
- bool IsPPC =
- Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le;
- // Check if we can use copy relocations. PowerPC has no copy relocations.
- if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs))
- return true;
- }
-
- // ELF supports preemption of other symbols.
- return false;
-}
-
-TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const {
- bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default;
- Reloc::Model RM = getRelocationModel();
- bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE;
- bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV);
-
- TLSModel::Model Model;
- if (IsSharedLibrary) {
- if (IsLocal)
- Model = TLSModel::LocalDynamic;
- else
- Model = TLSModel::GeneralDynamic;
- } else {
- if (IsLocal)
- Model = TLSModel::LocalExec;
- else
- Model = TLSModel::InitialExec;
- }
-
- // If the user specified a more specific model, use that.
- TLSModel::Model SelectedModel = getSelectedTLSModel(GV);
- if (SelectedModel > Model)
- return SelectedModel;
-
- return Model;
-}
-
-/// Returns the optimization level: None, Less, Default, or Aggressive.
-CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; }
-
-void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; }
-
-TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
- return TargetIRAnalysis([](const Function &F) {
- return TargetTransformInfo(F.getParent()->getDataLayout());
- });
-}
-
-void TargetMachine::getNameWithPrefix(SmallVectorImpl<char> &Name,
- const GlobalValue *GV, Mangler &Mang,
- bool MayAlwaysUsePrivate) const {
- if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) {
- // Simple case: If GV is not private, it is not important to find out if
- // private labels are legal in this case or not.
- Mang.getNameWithPrefix(Name, GV, false);
- return;
- }
- const TargetLoweringObjectFile *TLOF = getObjFileLowering();
- TLOF->getNameWithPrefix(Name, GV, *this);
-}
-
-MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const {
- const TargetLoweringObjectFile *TLOF = getObjFileLowering();
- SmallString<128> NameStr;
- getNameWithPrefix(NameStr, GV, TLOF->getMangler());
- return TLOF->getContext().getOrCreateSymbol(NameStr);
-}
Removed: llvm/trunk/lib/Target/TargetMachineC.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachineC.cpp?rev=315632&view=auto
==============================================================================
--- llvm/trunk/lib/Target/TargetMachineC.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachineC.cpp (removed)
@@ -1,244 +0,0 @@
-//===-- TargetMachine.cpp -------------------------------------------------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the LLVM-C part of TargetMachine.h
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm-c/Core.h"
-#include "llvm-c/Target.h"
-#include "llvm-c/TargetMachine.h"
-#include "llvm/Analysis/TargetTransformInfo.h"
-#include "llvm/IR/DataLayout.h"
-#include "llvm/IR/LegacyPassManager.h"
-#include "llvm/IR/Module.h"
-#include "llvm/Support/CodeGenCWrappers.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/FormattedStream.h"
-#include "llvm/Support/Host.h"
-#include "llvm/Support/TargetRegistry.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-#include <cassert>
-#include <cstdlib>
-#include <cstring>
-
-using namespace llvm;
-
-static TargetMachine *unwrap(LLVMTargetMachineRef P) {
- return reinterpret_cast<TargetMachine *>(P);
-}
-static Target *unwrap(LLVMTargetRef P) {
- return reinterpret_cast<Target*>(P);
-}
-static LLVMTargetMachineRef wrap(const TargetMachine *P) {
- return reinterpret_cast<LLVMTargetMachineRef>(const_cast<TargetMachine *>(P));
-}
-static LLVMTargetRef wrap(const Target * P) {
- return reinterpret_cast<LLVMTargetRef>(const_cast<Target*>(P));
-}
-
-LLVMTargetRef LLVMGetFirstTarget() {
- if (TargetRegistry::targets().begin() == TargetRegistry::targets().end()) {
- return nullptr;
- }
-
- const Target *target = &*TargetRegistry::targets().begin();
- return wrap(target);
-}
-LLVMTargetRef LLVMGetNextTarget(LLVMTargetRef T) {
- return wrap(unwrap(T)->getNext());
-}
-
-LLVMTargetRef LLVMGetTargetFromName(const char *Name) {
- StringRef NameRef = Name;
- auto I = find_if(TargetRegistry::targets(),
- [&](const Target &T) { return T.getName() == NameRef; });
- return I != TargetRegistry::targets().end() ? wrap(&*I) : nullptr;
-}
-
-LLVMBool LLVMGetTargetFromTriple(const char* TripleStr, LLVMTargetRef *T,
- char **ErrorMessage) {
- std::string Error;
-
- *T = wrap(TargetRegistry::lookupTarget(TripleStr, Error));
-
- if (!*T) {
- if (ErrorMessage)
- *ErrorMessage = strdup(Error.c_str());
-
- return 1;
- }
-
- return 0;
-}
-
-const char * LLVMGetTargetName(LLVMTargetRef T) {
- return unwrap(T)->getName();
-}
-
-const char * LLVMGetTargetDescription(LLVMTargetRef T) {
- return unwrap(T)->getShortDescription();
-}
-
-LLVMBool LLVMTargetHasJIT(LLVMTargetRef T) {
- return unwrap(T)->hasJIT();
-}
-
-LLVMBool LLVMTargetHasTargetMachine(LLVMTargetRef T) {
- return unwrap(T)->hasTargetMachine();
-}
-
-LLVMBool LLVMTargetHasAsmBackend(LLVMTargetRef T) {
- return unwrap(T)->hasMCAsmBackend();
-}
-
-LLVMTargetMachineRef LLVMCreateTargetMachine(LLVMTargetRef T,
- const char *Triple, const char *CPU, const char *Features,
- LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,
- LLVMCodeModel CodeModel) {
- Optional<Reloc::Model> RM;
- switch (Reloc){
- case LLVMRelocStatic:
- RM = Reloc::Static;
- break;
- case LLVMRelocPIC:
- RM = Reloc::PIC_;
- break;
- case LLVMRelocDynamicNoPic:
- RM = Reloc::DynamicNoPIC;
- break;
- default:
- break;
- }
-
- bool JIT;
- Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
-
- CodeGenOpt::Level OL;
- switch (Level) {
- case LLVMCodeGenLevelNone:
- OL = CodeGenOpt::None;
- break;
- case LLVMCodeGenLevelLess:
- OL = CodeGenOpt::Less;
- break;
- case LLVMCodeGenLevelAggressive:
- OL = CodeGenOpt::Aggressive;
- break;
- default:
- OL = CodeGenOpt::Default;
- break;
- }
-
- TargetOptions opt;
- return wrap(unwrap(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM,
- OL, JIT));
-}
-
-void LLVMDisposeTargetMachine(LLVMTargetMachineRef T) { delete unwrap(T); }
-
-LLVMTargetRef LLVMGetTargetMachineTarget(LLVMTargetMachineRef T) {
- const Target* target = &(unwrap(T)->getTarget());
- return wrap(target);
-}
-
-char* LLVMGetTargetMachineTriple(LLVMTargetMachineRef T) {
- std::string StringRep = unwrap(T)->getTargetTriple().str();
- return strdup(StringRep.c_str());
-}
-
-char* LLVMGetTargetMachineCPU(LLVMTargetMachineRef T) {
- std::string StringRep = unwrap(T)->getTargetCPU();
- return strdup(StringRep.c_str());
-}
-
-char* LLVMGetTargetMachineFeatureString(LLVMTargetMachineRef T) {
- std::string StringRep = unwrap(T)->getTargetFeatureString();
- return strdup(StringRep.c_str());
-}
-
-void LLVMSetTargetMachineAsmVerbosity(LLVMTargetMachineRef T,
- LLVMBool VerboseAsm) {
- unwrap(T)->Options.MCOptions.AsmVerbose = VerboseAsm;
-}
-
-LLVMTargetDataRef LLVMCreateTargetDataLayout(LLVMTargetMachineRef T) {
- return wrap(new DataLayout(unwrap(T)->createDataLayout()));
-}
-
-static LLVMBool LLVMTargetMachineEmit(LLVMTargetMachineRef T, LLVMModuleRef M,
- raw_pwrite_stream &OS,
- LLVMCodeGenFileType codegen,
- char **ErrorMessage) {
- TargetMachine* TM = unwrap(T);
- Module* Mod = unwrap(M);
-
- legacy::PassManager pass;
-
- std::string error;
-
- Mod->setDataLayout(TM->createDataLayout());
-
- TargetMachine::CodeGenFileType ft;
- switch (codegen) {
- case LLVMAssemblyFile:
- ft = TargetMachine::CGFT_AssemblyFile;
- break;
- default:
- ft = TargetMachine::CGFT_ObjectFile;
- break;
- }
- if (TM->addPassesToEmitFile(pass, OS, ft)) {
- error = "TargetMachine can't emit a file of this type";
- *ErrorMessage = strdup(error.c_str());
- return true;
- }
-
- pass.run(*Mod);
-
- OS.flush();
- return false;
-}
-
-LLVMBool LLVMTargetMachineEmitToFile(LLVMTargetMachineRef T, LLVMModuleRef M,
- char* Filename, LLVMCodeGenFileType codegen, char** ErrorMessage) {
- std::error_code EC;
- raw_fd_ostream dest(Filename, EC, sys::fs::F_None);
- if (EC) {
- *ErrorMessage = strdup(EC.message().c_str());
- return true;
- }
- bool Result = LLVMTargetMachineEmit(T, M, dest, codegen, ErrorMessage);
- dest.flush();
- return Result;
-}
-
-LLVMBool LLVMTargetMachineEmitToMemoryBuffer(LLVMTargetMachineRef T,
- LLVMModuleRef M, LLVMCodeGenFileType codegen, char** ErrorMessage,
- LLVMMemoryBufferRef *OutMemBuf) {
- SmallString<0> CodeString;
- raw_svector_ostream OStream(CodeString);
- bool Result = LLVMTargetMachineEmit(T, M, OStream, codegen, ErrorMessage);
-
- StringRef Data = OStream.str();
- *OutMemBuf =
- LLVMCreateMemoryBufferWithMemoryRangeCopy(Data.data(), Data.size(), "");
- return Result;
-}
-
-char *LLVMGetDefaultTargetTriple(void) {
- return strdup(sys::getDefaultTargetTriple().c_str());
-}
-
-void LLVMAddAnalysisPasses(LLVMTargetMachineRef T, LLVMPassManagerRef PM) {
- unwrap(PM)->add(
- createTargetTransformInfoWrapperPass(unwrap(T)->getTargetIRAnalysis()));
-}
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -69,11 +69,10 @@ WebAssemblyTargetMachine::WebAssemblyTar
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(T,
- TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
- : "e-m:e-p:32:32-i64:64-n32:64-S128",
- TT, CPU, FS, Options, getEffectiveRelocModel(RM),
- CM ? *CM : CodeModel::Large, OL),
+ : TargetMachine(T, TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
+ : "e-m:e-p:32:32-i64:64-n32:64-S128",
+ TT, CPU, FS, Options, getEffectiveRelocModel(RM),
+ CM ? *CM : CodeModel::Large, OL),
TLOF(TT.isOSBinFormatELF() ?
static_cast<TargetLoweringObjectFile*>(
new WebAssemblyTargetObjectFileELF()) :
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -21,7 +21,7 @@
namespace llvm {
-class WebAssemblyTargetMachine final : public LLVMTargetMachine {
+class WebAssemblyTargetMachine final : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap;
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -200,7 +200,7 @@ X86TargetMachine::X86TargetMachine(const
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(
+ : TargetMachine(
T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(TT, RM),
getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL),
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Thu Oct 12 15:28:54 2017
@@ -28,7 +28,7 @@ class StringRef;
class X86Subtarget;
class X86RegisterBankInfo;
-class X86TargetMachine final : public LLVMTargetMachine {
+class X86TargetMachine final : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap;
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Thu Oct 12 15:28:54 2017
@@ -48,7 +48,7 @@ XCoreTargetMachine::XCoreTargetMachine(c
Optional<Reloc::Model> RM,
Optional<CodeModel::Model> CM,
CodeGenOpt::Level OL, bool JIT)
- : LLVMTargetMachine(
+ : TargetMachine(
T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
TT, CPU, FS, Options, getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM), OL),
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h Thu Oct 12 15:28:54 2017
@@ -24,7 +24,7 @@
namespace llvm {
-class XCoreTargetMachine : public LLVMTargetMachine {
+class XCoreTargetMachine : public TargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
XCoreSubtarget Subtarget;
Modified: llvm/trunk/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/tools/llc/llc.cpp (original)
+++ llvm/trunk/tools/llc/llc.cpp Thu Oct 12 15:28:54 2017
@@ -511,8 +511,7 @@ static int compileModule(char **argv, LL
}
const char *argv0 = argv[0];
- LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine&>(*Target);
- MachineModuleInfo *MMI = new MachineModuleInfo(&LLVMTM);
+ MachineModuleInfo *MMI = new MachineModuleInfo(Target.get());
// Construct a custom pass pipeline that starts after instruction
// selection.
@@ -521,7 +520,7 @@ static int compileModule(char **argv, LL
errs() << argv0 << ": run-pass is for .mir file only.\n";
return 1;
}
- TargetPassConfig &TPC = *LLVMTM.createPassConfig(PM);
+ TargetPassConfig &TPC = *Target->createPassConfig(PM);
if (TPC.hasLimitedCodeGenPipeline()) {
errs() << argv0 << ": run-pass cannot be used with "
<< TPC.getLimitedCodeGenPipelineReason(" and ") << ".\n";
Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Thu Oct 12 15:28:54 2017
@@ -593,10 +593,9 @@ int main(int argc, char **argv) {
}
if (TM) {
- // FIXME: We should dyn_cast this when supported.
- auto <M = static_cast<LLVMTargetMachine &>(*TM);
- Pass *TPC = LTM.createPassConfig(Passes);
- Passes.add(TPC);
+ Pass *TPC = TM->createPassConfig(Passes);
+ if (TPC)
+ Passes.add(TPC);
}
// Create a new optimization pass for each one specified on the command line
Modified: llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp?rev=315633&r1=315632&r2=315633&view=diff
==============================================================================
--- llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp (original)
+++ llvm/trunk/unittests/CodeGen/MachineInstrTest.cpp Thu Oct 12 15:28:54 2017
@@ -62,11 +62,11 @@ private:
TargetInstrInfo TII;
};
-class BogusTargetMachine : public LLVMTargetMachine {
+class BogusTargetMachine : public TargetMachine {
public:
BogusTargetMachine()
- : LLVMTargetMachine(Target(), "", Triple(""), "", "", TargetOptions(),
- Reloc::Static, CodeModel::Small, CodeGenOpt::Default),
+ : TargetMachine(Target(), "", Triple(""), "", "", TargetOptions(),
+ Reloc::Static, CodeModel::Small, CodeGenOpt::Default),
ST(*this) {}
~BogusTargetMachine() override {}
More information about the llvm-commits
mailing list