[PATCH] D38841: [mips] Provide alternate predicates for constant synthesis

[Stefan Maksimovic via Phabricator via llvm-commits]

smaksimovic created this revision.
Herald added a subscriber: arichardson.

Ordering of patterns should not be of importance anymore since the predicates used are mutually exclusive now.
Note: a test is missing since with these changes alone the order of the patterns remains the same which results in the same behavior with and without these changes.


https://reviews.llvm.org/D38841

Files:
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/MipsInstrInfo.td


Index: lib/Target/Mips/MipsInstrInfo.td
===================================================================
--- lib/Target/Mips/MipsInstrInfo.td
+++ lib/Target/Mips/MipsInstrInfo.td
@@ -1833,6 +1833,23 @@
 def LONG_BRANCH_ADDiu : PseudoSE<(outs GPR32Opnd:$dst),
   (ins GPR32Opnd:$src, brtarget:$tgt, brtarget:$baltgt), []>;
 
+def ORiPred  : PatLeaf<(imm), [{
+  uint64_t ZVal = N->getZExtValue();
+  int64_t SVal = N->getSExtValue();
+  bool cond =  isUInt<16>(ZVal) && !isInt<16>(SVal);
+  return (uint32_t)ZVal == (unsigned short)ZVal && cond;
+}], LO16>;
+
+def LUiPred : PatLeaf<(imm), [{
+  int64_t Val = N->getSExtValue();
+  return !isInt<16>(Val) && isInt<32>(Val) && !(Val & 0xffff);
+}]>;
+
+def LUiORiPred  : PatLeaf<(imm), [{
+  int64_t SVal = N->getSExtValue();
+  return isInt<32>(SVal) && (SVal & 0xffff);
+}]>;
+
 //===----------------------------------------------------------------------===//
 // Instruction definition
 //===----------------------------------------------------------------------===//
@@ -2718,13 +2735,13 @@
 
 // Small immediates
 def : MipsPat<(VT immSExt16:$imm), (ADDiuOp ZEROReg, imm:$imm)>;
-def : MipsPat<(VT immZExt16:$imm), (ORiOp ZEROReg, imm:$imm)>;
+def : MipsPat<(VT ORiPred:$imm), (ORiOp ZEROReg, imm:$imm)>;
 
 // Bits 32-16 set, sign/zero extended.
-def : MipsPat<(VT immSExt32Low16Zero:$imm), (LUiOp (HI16 imm:$imm))>;
+def : MipsPat<(VT LUiPred:$imm), (LUiOp (HI16 imm:$imm))>;
 
 // Arbitrary immediates
-def : MipsPat<(VT immSExt32:$imm), (ORiOp (LUiOp (HI16 imm:$imm)), (LO16 imm:$imm))>;
+def : MipsPat<(VT LUiORiPred:$imm), (ORiOp (LUiOp (HI16 imm:$imm)), (LO16 imm:$imm))>;
 }
 
 let AdditionalPredicates = [NotInMicroMips] in
Index: lib/Target/Mips/MicroMipsInstrInfo.td
===================================================================
--- lib/Target/Mips/MicroMipsInstrInfo.td
+++ lib/Target/Mips/MicroMipsInstrInfo.td
@@ -1006,8 +1006,10 @@
 // MicroMips arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
 
-def : MipsPat<(i32 immLi16:$imm),
-              (LI16_MM immLi16:$imm)>;
+let Predicates = [InMicroMips] in {
+  def : MipsPat<(i32 immLi16:$imm),
+                (LI16_MM immLi16:$imm)>;
+}
 
 let AdditionalPredicates = [InMicroMips] in
 defm :  MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>;


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