[llvm] r315564 - [RegisterCoalescer] Don't set read-undef in pruneValues, only clear

[Mikael Holmen via llvm-commits]

Author: uabelho
Date: Wed Oct 11 23:21:28 2017
New Revision: 315564

URL: http://llvm.org/viewvc/llvm-project?rev=315564&view=rev
Log:
[RegisterCoalescer] Don't set read-undef in pruneValues, only clear

Summary:
The comments in the code said

 // Remove <def,read-undef> flags. This def is now a partial redef.

but the code didn't just remove read-undef, it could introduce new ones which
could cause errors.

E.g. if we have something like

%vreg1<def> = IMPLICIT_DEF
%vreg2:subreg1<def, read-undef> = op %vreg3, %vreg4
%vreg2:subreg2<def> = op %vreg6, %vreg7

and we merge %vreg1 and %vreg2 then we should not set undef on the second subreg
def, which the old code did.

Now we solve this by actually do what the code comment says. We remove
read-undef flags rather than remove or introduce them.

Reviewers: qcolombet, MatzeB

Reviewed By: MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38616

Added:
    llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir
Modified:
    llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp

Modified: llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=315564&r1=315563&r2=315564&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp Wed Oct 11 23:21:28 2017
@@ -2685,8 +2685,8 @@ void JoinVals::pruneValues(JoinVals &Oth
           for (MachineOperand &MO :
                Indexes->getInstructionFromIndex(Def)->operands()) {
             if (MO.isReg() && MO.isDef() && MO.getReg() == Reg) {
-              if (MO.getSubReg() != 0)
-                MO.setIsUndef(EraseImpDef);
+              if (MO.getSubReg() != 0 && MO.isUndef() && !EraseImpDef)
+                MO.setIsUndef(false);
               MO.setIsDead(false);
             }
           }

Added: llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir?rev=315564&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir Wed Oct 11 23:21:28 2017
@@ -0,0 +1,30 @@
+# RUN: llc -mtriple=x86_64-- %s -o - -run-pass=simple-register-coalescing | FileCheck %s
+---
+name: f
+body: |
+  bb.0:
+    JB_1 %bb.2, undef implicit killed %eflags
+    JMP_1 %bb.1
+
+  bb.1:
+    %0 : gr64 = IMPLICIT_DEF
+    NOOP implicit-def undef %1.sub_32bit : gr64
+    NOOP implicit-def %1.sub_16bit : gr64
+    JMP_1 %bb.3
+
+  bb.2:
+    NOOP implicit-def %0
+    %1 = COPY %0
+
+  bb.3:
+    NOOP implicit killed %0
+    NOOP implicit killed %1
+...
+
+# We should have a setting of both sub_32bit and sub_16bit. The first one
+# should be undef and not dead, and the second should not be undef.
+
+# CHECK-NOT:  dead
+# CHECK:      NOOP implicit-def undef %1.sub_32bit
+# CHECK-NOT:  undef
+# CHECK-NEXT: NOOP implicit-def %1.sub_16bit